what:
some os preemption path is messed up with world switch preemption

fix:
cleanup those logics so os preemption not mixed with world switch

this patch is a general fix for issues comes from SRIOV MCBP, but
there is still UMD side issues not resovlved yet, so this patch
cannot fix all world switch bug.

Signed-off-by: Monk Liu <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 3 ++-
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c   | 8 ++++----
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index a2ee30b..7854c05 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -70,7 +70,8 @@ uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring,
        uint32_t index = 0;
        int r;
 
-       if (vmid == 0 || !amdgpu_mcbp)
+       /* don't enable OS preemption on SDMA under SRIOV */
+       if (amdgpu_sriov_vf(adev) || vmid == 0 || !amdgpu_mcbp)
                return 0;
 
        r = amdgpu_sdma_get_index_from_ring(ring, &index);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c 
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 5e9fb09..7b61583 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -4413,7 +4413,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring 
*ring,
 
        control |= ib->length_dw | (vmid << 24);
 
-       if (amdgpu_mcbp && (ib->flags & AMDGPU_IB_FLAG_PREEMPT)) {
+       if ((amdgpu_sriov_vf(ring->adev) || amdgpu_mcbp) && (ib->flags & 
AMDGPU_IB_FLAG_PREEMPT)) {
                control |= INDIRECT_BUFFER_PRE_ENB(1);
 
                if (flags & AMDGPU_IB_PREEMPTED)
@@ -4421,7 +4421,7 @@ static void gfx_v10_0_ring_emit_ib_gfx(struct amdgpu_ring 
*ring,
 
                if (!(ib->flags & AMDGPU_IB_FLAG_CE))
                        gfx_v10_0_ring_emit_de_meta(ring,
-                                   flags & AMDGPU_IB_PREEMPTED ? true : false);
+                                   (!amdgpu_sriov_vf(ring->adev) && flags & 
AMDGPU_IB_PREEMPTED) ? true : false);
        }
 
        amdgpu_ring_write(ring, header);
@@ -4569,9 +4569,9 @@ static void gfx_v10_0_ring_emit_cntxcntl(struct 
amdgpu_ring *ring,
 {
        uint32_t dw2 = 0;
 
-       if (amdgpu_mcbp)
+       if (amdgpu_mcbp || amdgpu_sriov_vf(ring->adev))
                gfx_v10_0_ring_emit_ce_meta(ring,
-                                   flags & AMDGPU_IB_PREEMPTED ? true : false);
+                                   (!amdgpu_sriov_vf(ring->adev) && flags & 
AMDGPU_IB_PREEMPTED) ? true : false);
 
        dw2 |= 0x80000000; /* set load_enable otherwise this package is just 
NOPs */
        if (flags & AMDGPU_HAVE_CTX_SWITCH) {
-- 
2.7.4

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