[AMD Official Use Only - Internal Distribution Only] With the v2 version for patch #6, #7 and the fix to enable doorbell int after BACO exit in Patch #5,
The series is Reviewed-by: Hawking Zhang <[email protected]> Regards, Hawking -----Original Message----- From: Le Ma <[email protected]> Sent: 2019年11月27日 17:15 To: [email protected] Cc: Zhang, Hawking <[email protected]>; Chen, Guchun <[email protected]>; Zhou1, Tao <[email protected]>; Li, Dennis <[email protected]>; Deucher, Alexander <[email protected]>; Ma, Le <[email protected]> Subject: [PATCH 01/10] drm/amdgpu: remove ras global recovery handling from ras_controller_int handler From: Le Ma <[email protected]> v2: add notification when ras controller interrupt generates Change-Id: Ic03e42e9d1c4dab1fa7f4817c191a16e485b48a9 Signed-off-by: Le Ma <[email protected]> --- drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c index 0db458f..25231d6 100644 --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c @@ -324,7 +324,12 @@ static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device RAS_CNTLR_INTERRUPT_CLEAR, 1); WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl); - amdgpu_ras_global_ras_isr(adev); + DRM_WARN("RAS controller interrupt triggered by NBIF error\n"); + + /* ras_controller_int is dedicated for nbif ras error, + * not the global interrupt for sync flood + */ + amdgpu_ras_reset_gpu(adev, true); } } -- 2.7.4 _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
