Hi Alex, On 23/10/2019 14:50, Deucher, Alexander wrote: >> -----Original Message----- >> From: amd-gfx <[email protected]> On Behalf Of >> Christian König >> Sent: Wednesday, October 23, 2019 3:33 AM >> To: Pelloux-prayer, Pierre-eric <[email protected]>; amd- >> [email protected] >> Subject: Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2) >> >> Am 22.10.19 um 19:22 schrieb Pelloux-prayer, Pierre-eric: >>> This seems to help with >> https://bugs.freedesktop.org/show_bug.cgi?id=111481. >>> >>> v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older >> hw >>> >>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux- >> [email protected]> >> >> Reviewed-by: Christian König <[email protected]> > > Do nop packets have any alignment requirements on SDMA? Some of the other > packets do.
There's no alignment requirements for nop packets. Pierre-Eric > > Alex > >> >>> --- >>> drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 + >>> 1 file changed, 1 insertion(+) >>> >>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c >> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c >>> index fb48622c2abd..6e1b25bd1fe7 100644 >>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c >>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c >>> @@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct >> amdgpu_device *adev, uint32_t vmid, >>> >>> job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo); >>> job->vm_needs_flush = true; >>> + job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop; >>> amdgpu_ring_pad_ib(ring, &job->ibs[0]); >>> r = amdgpu_job_submit(job, &adev->mman.entity, >>> AMDGPU_FENCE_OWNER_UNDEFINED, &fence); >> >> _______________________________________________ >> amd-gfx mailing list >> [email protected] >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
