On 2019-09-26 2:38 p.m., Zhao, Yong wrote: > get_atc_vmid_pasid_mapping_valid() is very similar to > get_atc_vmid_pasid_mapping_pasid(), so they can be merged into a new > function get_atc_vmid_pasid_mapping_info() to reduce register access > times.
Hmm, the most important part may actually not be the time saved, but getting the PASID and the valid bit atomically with a single read. That could fix some potential race conditions where the mapping changes between the two reads. Add that to the patch description and the patch is Reviewed-by: Felix Kuehling <[email protected]> > > Change-Id: I255ebf2629012400b07fe6a69c3d075cfd46612e > Signed-off-by: Yong Zhao <[email protected]> > --- > .../drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c | 6 +-- > .../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c | 49 +++++++------------ > .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c | 28 ++++------- > .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c | 32 ++++-------- > .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 45 +++++++---------- > .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h | 6 +-- > .../gpu/drm/amd/amdkfd/cik_event_interrupt.c | 8 +-- > drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c | 16 +++--- > .../gpu/drm/amd/include/kgd_kfd_interface.h | 8 ++- > 9 files changed, 76 insertions(+), 122 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c > index eb6e8b232729..5e1bd6500fe2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_arcturus.c > @@ -279,10 +279,8 @@ static const struct kfd2kgd_calls kfd2kgd = { > .address_watch_execute = kgd_gfx_v9_address_watch_execute, > .wave_control_execute = kgd_gfx_v9_wave_control_execute, > .address_watch_get_offset = kgd_gfx_v9_address_watch_get_offset, > - .get_atc_vmid_pasid_mapping_pasid = > - kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid, > - .get_atc_vmid_pasid_mapping_valid = > - kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid, > + .get_atc_vmid_pasid_mapping_info = > + kgd_gfx_v9_get_atc_vmid_pasid_mapping_info, > .get_tile_config = kgd_gfx_v9_get_tile_config, > .set_vm_context_page_table_base = > kgd_gfx_v9_set_vm_context_page_table_base, > .invalidate_tlbs = kgd_gfx_v9_invalidate_tlbs, > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > index 09d50949c5b9..57ff698f51bb 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c > @@ -100,10 +100,8 @@ static uint32_t kgd_address_watch_get_offset(struct > kgd_dev *kgd, > unsigned int watch_point_id, > unsigned int reg_offset); > > -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid); > -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid); > +static bool get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid); > static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t > vmid, > uint64_t page_table_base); > static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid); > @@ -157,10 +155,8 @@ static const struct kfd2kgd_calls kfd2kgd = { > .address_watch_execute = kgd_address_watch_execute, > .wave_control_execute = kgd_wave_control_execute, > .address_watch_get_offset = kgd_address_watch_get_offset, > - .get_atc_vmid_pasid_mapping_pasid = > - get_atc_vmid_pasid_mapping_pasid, > - .get_atc_vmid_pasid_mapping_valid = > - get_atc_vmid_pasid_mapping_valid, > + .get_atc_vmid_pasid_mapping_info = > + get_atc_vmid_pasid_mapping_info, > .get_tile_config = amdgpu_amdkfd_get_tile_config, > .set_vm_context_page_table_base = set_vm_context_page_table_base, > .invalidate_tlbs = invalidate_tlbs, > @@ -772,26 +768,17 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, > void *mqd, > return 0; > } > > -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid) > +static bool get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid) > { > - uint32_t reg; > + uint32_t value; > struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > > - reg = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) > + value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) > + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__VALID_MASK; > -} > - > -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid) > -{ > - uint32_t reg; > - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > + *p_pasid = value & ATC_VMID0_PASID_MAPPING__PASID_MASK; > > - reg = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) > - + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__PASID_MASK; > + return !!(value & ATC_VMID0_PASID_MAPPING__VALID_MASK); > } > > static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t > pasid) > @@ -823,6 +810,8 @@ static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t > pasid) > { > struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > int vmid; > + uint16_t queried_pasid; > + bool ret; > struct amdgpu_ring *ring = &adev->gfx.kiq.ring; > > if (amdgpu_emu_mode == 0 && ring->sched.ready) > @@ -831,13 +820,13 @@ static int invalidate_tlbs(struct kgd_dev *kgd, > uint16_t pasid) > for (vmid = 0; vmid < 16; vmid++) { > if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) > continue; > - if (get_atc_vmid_pasid_mapping_valid(kgd, vmid)) { > - if (get_atc_vmid_pasid_mapping_pasid(kgd, vmid) > - == pasid) { > - amdgpu_gmc_flush_gpu_tlb(adev, vmid, > - AMDGPU_GFXHUB_0, 0); > - break; > - } > + > + ret = get_atc_vmid_pasid_mapping_info(kgd, vmid, > + &queried_pasid); > + if (ret && queried_pasid == pasid) { > + amdgpu_gmc_flush_gpu_tlb(adev, vmid, > + AMDGPU_GFXHUB_0, 0); > + break; > } > } > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c > index dd7548e9932b..ac811361246d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c > @@ -136,9 +136,8 @@ static uint32_t kgd_address_watch_get_offset(struct > kgd_dev *kgd, > unsigned int watch_point_id, > unsigned int reg_offset); > > -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, uint8_t > vmid); > -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid); > +static bool get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid); > > static void set_scratch_backing_va(struct kgd_dev *kgd, > uint64_t va, uint32_t vmid); > @@ -189,8 +188,7 @@ static const struct kfd2kgd_calls kfd2kgd = { > .address_watch_execute = kgd_address_watch_execute, > .wave_control_execute = kgd_wave_control_execute, > .address_watch_get_offset = kgd_address_watch_get_offset, > - .get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid, > - .get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid, > + .get_atc_vmid_pasid_mapping_info = get_atc_vmid_pasid_mapping_info, > .set_scratch_backing_va = set_scratch_backing_va, > .get_tile_config = get_tile_config, > .set_vm_context_page_table_base = set_vm_context_page_table_base, > @@ -756,24 +754,16 @@ static uint32_t kgd_address_watch_get_offset(struct > kgd_dev *kgd, > return watchRegs[watch_point_id * ADDRESS_WATCH_REG_MAX + reg_offset]; > } > > -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid) > +static bool get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid) > { > - uint32_t reg; > + uint32_t value; > struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > > - reg = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__VALID_MASK; > -} > - > -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid) > -{ > - uint32_t reg; > - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > + value = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); > + *p_pasid = value & ATC_VMID0_PASID_MAPPING__PASID_MASK; > > - reg = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__PASID_MASK; > + return !!(value & ATC_VMID0_PASID_MAPPING__VALID_MASK); > } > > static void set_scratch_backing_va(struct kgd_dev *kgd, > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c > index f12ac78707b4..b7f0d594ec7b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c > @@ -99,10 +99,8 @@ static uint32_t kgd_address_watch_get_offset(struct > kgd_dev *kgd, > unsigned int watch_point_id, > unsigned int reg_offset); > > -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid); > -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid); > +static bool get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid); > static void set_scratch_backing_va(struct kgd_dev *kgd, > uint64_t va, uint32_t vmid); > static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t > vmid, > @@ -151,10 +149,8 @@ static const struct kfd2kgd_calls kfd2kgd = { > .address_watch_execute = kgd_address_watch_execute, > .wave_control_execute = kgd_wave_control_execute, > .address_watch_get_offset = kgd_address_watch_get_offset, > - .get_atc_vmid_pasid_mapping_pasid = > - get_atc_vmid_pasid_mapping_pasid, > - .get_atc_vmid_pasid_mapping_valid = > - get_atc_vmid_pasid_mapping_valid, > + .get_atc_vmid_pasid_mapping_info = > + get_atc_vmid_pasid_mapping_info, > .set_scratch_backing_va = set_scratch_backing_va, > .get_tile_config = get_tile_config, > .set_vm_context_page_table_base = set_vm_context_page_table_base, > @@ -677,24 +673,16 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, > void *mqd, > return 0; > } > > -static bool get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid) > +static bool get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid) > { > - uint32_t reg; > + uint32_t value; > struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > > - reg = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__VALID_MASK; > -} > - > -static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid) > -{ > - uint32_t reg; > - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > + value = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); > + *p_pasid = value & ATC_VMID0_PASID_MAPPING__PASID_MASK; > > - reg = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__PASID_MASK; > + return !!(value & ATC_VMID0_PASID_MAPPING__VALID_MASK); > } > > static int kgd_address_watch_disable(struct kgd_dev *kgd) > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > index f8f8d6fe8b52..4d2cbbdc439b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c > @@ -630,26 +630,17 @@ static int kgd_hqd_sdma_destroy(struct kgd_dev *kgd, > void *mqd, > return 0; > } > > -bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid) > +bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid) > { > - uint32_t reg; > + uint32_t value; > struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > > - reg = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) > + value = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) > + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__VALID_MASK; > -} > - > -uint16_t kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid) > -{ > - uint32_t reg; > - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > + *p_pasid = value & ATC_VMID0_PASID_MAPPING__PASID_MASK; > > - reg = RREG32(SOC15_REG_OFFSET(ATHUB, 0, mmATC_VMID0_PASID_MAPPING) > - + vmid); > - return reg & ATC_VMID0_PASID_MAPPING__PASID_MASK; > + return !!(value & ATC_VMID0_PASID_MAPPING__VALID_MASK); > } > > static int invalidate_tlbs_with_kiq(struct amdgpu_device *adev, uint16_t > pasid, > @@ -684,6 +675,8 @@ int kgd_gfx_v9_invalidate_tlbs(struct kgd_dev *kgd, > uint16_t pasid) > { > struct amdgpu_device *adev = (struct amdgpu_device *) kgd; > int vmid, i; > + uint16_t queried_pasid; > + bool ret; > struct amdgpu_ring *ring = &adev->gfx.kiq.ring; > uint32_t flush_type = 0; > > @@ -699,14 +692,14 @@ int kgd_gfx_v9_invalidate_tlbs(struct kgd_dev *kgd, > uint16_t pasid) > for (vmid = 0; vmid < 16; vmid++) { > if (!amdgpu_amdkfd_is_kfd_vmid(adev, vmid)) > continue; > - if (kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid(kgd, vmid)) { > - if (kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid(kgd, > vmid) > - == pasid) { > - for (i = 0; i < adev->num_vmhubs; i++) > - amdgpu_gmc_flush_gpu_tlb(adev, vmid, > - i, flush_type); > - break; > - } > + > + ret = kgd_gfx_v9_get_atc_vmid_pasid_mapping_info(kgd, vmid, > + &queried_pasid); > + if (ret && queried_pasid == pasid) { > + for (i = 0; i < adev->num_vmhubs; i++) > + amdgpu_gmc_flush_gpu_tlb(adev, vmid, > + i, flush_type); > + break; > } > } > > @@ -1040,10 +1033,8 @@ static const struct kfd2kgd_calls kfd2kgd = { > .address_watch_execute = kgd_gfx_v9_address_watch_execute, > .wave_control_execute = kgd_gfx_v9_wave_control_execute, > .address_watch_get_offset = kgd_gfx_v9_address_watch_get_offset, > - .get_atc_vmid_pasid_mapping_pasid = > - kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid, > - .get_atc_vmid_pasid_mapping_valid = > - kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid, > + .get_atc_vmid_pasid_mapping_info = > + kgd_gfx_v9_get_atc_vmid_pasid_mapping_info, > .get_tile_config = kgd_gfx_v9_get_tile_config, > .set_vm_context_page_table_base = > kgd_gfx_v9_set_vm_context_page_table_base, > .invalidate_tlbs = kgd_gfx_v9_invalidate_tlbs, > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > index c95c9fe3eb3d..fd4f504668cb 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.h > @@ -53,10 +53,8 @@ uint32_t kgd_gfx_v9_address_watch_get_offset(struct > kgd_dev *kgd, > unsigned int watch_point_id, > unsigned int reg_offset); > > -bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_valid(struct kgd_dev *kgd, > - uint8_t vmid); > -uint16_t kgd_gfx_v9_get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, > - uint8_t vmid); > +bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd, > + uint8_t vmid, uint16_t *p_pasid); > void kgd_gfx_v9_set_vm_context_page_table_base(struct kgd_dev *kgd, > uint32_t vmid, > uint64_t page_table_base); > int kgd_gfx_v9_invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid); > diff --git a/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c > b/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c > index 177d1e5329a5..9f59ba93cfe0 100644 > --- a/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c > +++ b/drivers/gpu/drm/amd/amdkfd/cik_event_interrupt.c > @@ -33,7 +33,9 @@ static bool cik_event_interrupt_isr(struct kfd_dev *dev, > const struct cik_ih_ring_entry *ihre = > (const struct cik_ih_ring_entry *)ih_ring_entry; > const struct kfd2kgd_calls *f2g = dev->kfd2kgd; > - unsigned int vmid, pasid; > + unsigned int vmid; > + uint16_t pasid; > + bool ret; > > /* This workaround is due to HW/FW limitation on Hawaii that > * VMID and PASID are not written into ih_ring_entry > @@ -48,13 +50,13 @@ static bool cik_event_interrupt_isr(struct kfd_dev *dev, > *tmp_ihre = *ihre; > > vmid = f2g->read_vmid_from_vmfault_reg(dev->kgd); > - pasid = f2g->get_atc_vmid_pasid_mapping_pasid(dev->kgd, vmid); > + ret = f2g->get_atc_vmid_pasid_mapping_info(dev->kgd, vmid, > &pasid); > > tmp_ihre->ring_id &= 0x000000ff; > tmp_ihre->ring_id |= vmid << 8; > tmp_ihre->ring_id |= pasid << 16; > > - return (pasid != 0) && > + return ret && (pasid != 0) && > vmid >= dev->vm_info.first_vmid_kfd && > vmid <= dev->vm_info.last_vmid_kfd; > } > diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c > b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c > index 492951cad143..1eb0c2bedcd9 100644 > --- a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c > +++ b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c > @@ -775,6 +775,7 @@ int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, > struct kfd_process *p) > { > int status = 0; > unsigned int vmid; > + uint16_t queried_pasid; > union SQ_CMD_BITS reg_sq_cmd; > union GRBM_GFX_INDEX_BITS reg_gfx_index; > struct kfd_process_device *pdd; > @@ -796,14 +797,13 @@ int dbgdev_wave_reset_wavefronts(struct kfd_dev *dev, > struct kfd_process *p) > */ > > for (vmid = first_vmid_to_scan; vmid <= last_vmid_to_scan; vmid++) { > - if (dev->kfd2kgd->get_atc_vmid_pasid_mapping_valid > - (dev->kgd, vmid)) { > - if (dev->kfd2kgd->get_atc_vmid_pasid_mapping_pasid > - (dev->kgd, vmid) == p->pasid) { > - pr_debug("Killing wave fronts of vmid %d and > pasid 0x%x\n", > - vmid, p->pasid); > - break; > - } > + status = dev->kfd2kgd->get_atc_vmid_pasid_mapping_info > + (dev->kgd, vmid, &queried_pasid); > + > + if (status && queried_pasid == p->pasid) { > + pr_debug("Killing wave fronts of vmid %d and pasid > 0x%x\n", > + vmid, p->pasid); > + break; > } > } > > diff --git a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > index 9f593c2ee4e0..32a1a53012dd 100644 > --- a/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > +++ b/drivers/gpu/drm/amd/include/kgd_kfd_interface.h > @@ -300,12 +300,10 @@ struct kfd2kgd_calls { > uint32_t (*address_watch_get_offset)(struct kgd_dev *kgd, > unsigned int watch_point_id, > unsigned int reg_offset); > - bool (*get_atc_vmid_pasid_mapping_valid)( > + bool (*get_atc_vmid_pasid_mapping_info)( > struct kgd_dev *kgd, > - uint8_t vmid); > - uint16_t (*get_atc_vmid_pasid_mapping_pasid)( > - struct kgd_dev *kgd, > - uint8_t vmid); > + uint8_t vmid, > + uint16_t *p_pasid); > > /* No longer needed from GFXv9 onward. The scratch base address is > * passed to the shader by the CP. It's the user mode driver's _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
