sdma ras ecc functions can be reused among all sdma generations

Signed-off-by: Tao Zhou <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 28 ++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h |  6 +++++
 drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c   | 24 ++------------------
 3 files changed, 36 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
index a25301b75ef7..b294157c1deb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c
@@ -135,3 +135,31 @@ int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
        adev->sdma.ras_if = NULL;
        return r;
 }
+
+int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
+               void *err_data,
+               struct amdgpu_iv_entry *entry)
+{
+       kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
+       amdgpu_ras_reset_gpu(adev, 0);
+
+       return AMDGPU_RAS_SUCCESS;
+}
+
+int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev,
+                                     struct amdgpu_irq_src *source,
+                                     struct amdgpu_iv_entry *entry)
+{
+       struct ras_common_if *ras_if = adev->sdma.ras_if;
+       struct ras_dispatch_if ih_data = {
+               .entry = entry,
+       };
+
+       if (!ras_if)
+               return 0;
+
+       ih_data.head = *ras_if;
+
+       amdgpu_ras_interrupt_dispatch(adev, &ih_data);
+       return 0;
+}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
index 79dcb907d00d..95e01d522537 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.h
@@ -106,4 +106,10 @@ int amdgpu_sdma_get_index_from_ring(struct amdgpu_ring 
*ring, uint32_t *index);
 uint64_t amdgpu_sdma_get_csa_mc_addr(struct amdgpu_ring *ring, unsigned vmid);
 int amdgpu_sdma_ras_late_init(struct amdgpu_device *adev,
                              void *ras_ih_info);
+int amdgpu_sdma_process_ras_data_cb(struct amdgpu_device *adev,
+               void *err_data,
+               struct amdgpu_iv_entry *entry);
+int amdgpu_sdma_process_ecc_irq(struct amdgpu_device *adev,
+                                     struct amdgpu_irq_src *source,
+                                     struct amdgpu_iv_entry *entry);
 #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c 
b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
index 35f81b52f088..a8e4b7d880fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
@@ -1958,32 +1958,12 @@ static int sdma_v4_0_process_ras_data_cb(struct 
amdgpu_device *adev,
                        return 0;
                }
 
-               kgd2kfd_set_sram_ecc_flag(adev->kfd.dev);
-
-               amdgpu_ras_reset_gpu(adev, 0);
+               amdgpu_sdma_process_ras_data_cb(adev, err_data, entry);
        }
 
        return AMDGPU_RAS_SUCCESS;
 }
 
-static int sdma_v4_0_process_ecc_irq(struct amdgpu_device *adev,
-                                     struct amdgpu_irq_src *source,
-                                     struct amdgpu_iv_entry *entry)
-{
-       struct ras_common_if *ras_if = adev->sdma.ras_if;
-       struct ras_dispatch_if ih_data = {
-               .entry = entry,
-       };
-
-       if (!ras_if)
-               return 0;
-
-       ih_data.head = *ras_if;
-
-       amdgpu_ras_interrupt_dispatch(adev, &ih_data);
-       return 0;
-}
-
 static int sdma_v4_0_process_illegal_inst_irq(struct amdgpu_device *adev,
                                              struct amdgpu_irq_src *source,
                                              struct amdgpu_iv_entry *entry)
@@ -2331,7 +2311,7 @@ static const struct amdgpu_irq_src_funcs 
sdma_v4_0_illegal_inst_irq_funcs = {
 
 static const struct amdgpu_irq_src_funcs sdma_v4_0_ecc_irq_funcs = {
        .set = sdma_v4_0_set_ecc_irq_state,
-       .process = sdma_v4_0_process_ecc_irq,
+       .process = amdgpu_sdma_process_ecc_irq,
 };
 
 
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to