From: Jun Lei <[email protected]>

move the update of otg instance outside of hw programming logic,
since this is sw state, it should always be updated and should
never be optimized away.

Signed-off-by: Jun Lei <[email protected]>
Reviewed-by: Eric Yang <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index b7b8e89f4be5..3687457f258b 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1153,7 +1153,6 @@ static enum dc_status dc_commit_state_no_check(struct dc 
*dc, struct dc_state *c
        /* Program all planes within new context*/
        for (i = 0; i < context->stream_count; i++) {
                const struct dc_link *link = context->streams[i]->link;
-               struct dc_stream_status *status;
 
                if (!context->streams[i]->mode_changed)
                        continue;
@@ -1178,9 +1177,6 @@ static enum dc_status dc_commit_state_no_check(struct dc 
*dc, struct dc_state *c
                        }
                }
 
-               status = dc_stream_get_status_from_state(context, 
context->streams[i]);
-               context->streams[i]->out.otg_offset = status->primary_otg_inst;
-
                CONN_MSG_MODE(link, "{%dx%d, %dx%d@%dKhz}",
                                context->streams[i]->timing.h_addressable,
                                context->streams[i]->timing.v_addressable,
-- 
2.17.1

_______________________________________________
amd-gfx mailing list
[email protected]
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

Reply via email to