On Mon, Feb 25, 2019 at 7:14 AM Huang Rui <[email protected]> wrote: > > This patch uses REG32_PCIE wrapper instead of writting pci_index2 and reading > pci_data2. This sequence should be protected by pcie_idx_lock. > > Signed-off-by: Huang Rui <[email protected]> > Reviewed-by: Hawking Zhang <[email protected]>
I left comments on a few patches. The rest are: Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > index 3d29afd..ef25884 100644 > --- a/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > +++ b/drivers/gpu/drm/amd/powerplay/smu_v11_0.c > @@ -201,14 +201,13 @@ static int smu_v11_0_check_fw_status(struct smu_context > *smu) > struct amdgpu_device *adev = smu->adev; > uint32_t mp1_fw_flags; > > - WREG32_SOC15(NBIF, 0, mmPCIE_INDEX2, > - (MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff))); > - > - mp1_fw_flags = RREG32_SOC15(NBIF, 0, mmPCIE_DATA2); > + mp1_fw_flags = RREG32_PCIE(MP1_Public | > + (smnMP1_FIRMWARE_FLAGS & 0xffffffff)); > > if ((mp1_fw_flags & MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK) >> > MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT) > return 0; > + > return -EIO; > } > > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
