Oh, already submitted. I use the same return error code(-1) as used in the same function for other asic (vega12) . BTW , the original -EPERM is defined as -1 , so they shouldn't make any real difference. Maybe later we use a separate change of the return code for all the existing asic .
Regards shaoyun.liu On 2019-02-19 5:20 p.m., Kuehling, Felix wrote: > On 2019-02-19 4:09 p.m., Liu, Shaoyun wrote: >> When DPM for the specific clock is difabled, driver should still print out >> current clock info for rocm-smi support on vega20 >> >> Change-Id: I8669c77bf153caa2cd63a575802eb58747151239 >> Signed-off-by: shaoyunl <[email protected]> >> --- >> drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 56 >> +++++++++++----------- >> 1 file changed, 28 insertions(+), 28 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c >> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c >> index aad79aff..c95e0f3 100644 >> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c >> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c >> @@ -2641,9 +2641,8 @@ static int vega20_get_sclks(struct pp_hwmgr *hwmgr, >> struct vega20_single_dpm_table *dpm_table = >> &(data->dpm_table.gfx_table); >> int i, count; >> >> - PP_ASSERT_WITH_CODE(data->smu_features[GNLD_DPM_GFXCLK].enabled, >> - "[GetSclks]: gfxclk dpm not enabled!\n", >> - return -EPERM); >> + if (!data->smu_features[GNLD_DPM_GFXCLK].enabled) >> + return -1; > Please return a proper error code here. > > Same for the other changes below. > > Regards, > Felix > > >> >> count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : >> dpm_table->count; >> clocks->num_levels = count; >> @@ -2670,9 +2669,8 @@ static int vega20_get_memclocks(struct pp_hwmgr *hwmgr, >> struct vega20_single_dpm_table *dpm_table = >> &(data->dpm_table.mem_table); >> int i, count; >> >> - PP_ASSERT_WITH_CODE(data->smu_features[GNLD_DPM_UCLK].enabled, >> - "[GetMclks]: uclk dpm not enabled!\n", >> - return -EPERM); >> + if (!data->smu_features[GNLD_DPM_UCLK].enabled) >> + return -1; >> >> count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : >> dpm_table->count; >> clocks->num_levels = data->mclk_latency_table.count = count; >> @@ -2696,9 +2694,8 @@ static int vega20_get_dcefclocks(struct pp_hwmgr >> *hwmgr, >> struct vega20_single_dpm_table *dpm_table = >> &(data->dpm_table.dcef_table); >> int i, count; >> >> - PP_ASSERT_WITH_CODE(data->smu_features[GNLD_DPM_DCEFCLK].enabled, >> - "[GetDcfclocks]: dcefclk dpm not enabled!\n", >> - return -EPERM); >> + if (!data->smu_features[GNLD_DPM_DCEFCLK].enabled) >> + return -1; >> >> count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : >> dpm_table->count; >> clocks->num_levels = count; >> @@ -2719,9 +2716,8 @@ static int vega20_get_socclocks(struct pp_hwmgr *hwmgr, >> struct vega20_single_dpm_table *dpm_table = >> &(data->dpm_table.soc_table); >> int i, count; >> >> - PP_ASSERT_WITH_CODE(data->smu_features[GNLD_DPM_SOCCLK].enabled, >> - "[GetSocclks]: socclk dpm not enabled!\n", >> - return -EPERM); >> + if (!data->smu_features[GNLD_DPM_SOCCLK].enabled) >> + return -1; >> >> count = (dpm_table->count > MAX_NUM_CLOCKS) ? MAX_NUM_CLOCKS : >> dpm_table->count; >> clocks->num_levels = count; >> @@ -3137,10 +3133,11 @@ static int vega20_print_clock_levels(struct pp_hwmgr >> *hwmgr, >> "Attempt to get current gfx clk Failed!", >> return ret); >> >> - ret = vega20_get_sclks(hwmgr, &clocks); >> - PP_ASSERT_WITH_CODE(!ret, >> - "Attempt to get gfx clk levels Failed!", >> - return ret); >> + if (vega20_get_sclks(hwmgr, &clocks)) { >> + size += sprintf(buf + size, "0: %uMhz * (DPM >> disabled)\n", >> + now / 100); >> + break; >> + } >> >> for (i = 0; i < clocks.num_levels; i++) >> size += sprintf(buf + size, "%d: %uMhz %s\n", >> @@ -3154,10 +3151,11 @@ static int vega20_print_clock_levels(struct pp_hwmgr >> *hwmgr, >> "Attempt to get current mclk freq Failed!", >> return ret); >> >> - ret = vega20_get_memclocks(hwmgr, &clocks); >> - PP_ASSERT_WITH_CODE(!ret, >> - "Attempt to get memory clk levels Failed!", >> - return ret); >> + if (vega20_get_memclocks(hwmgr, &clocks)) { >> + size += sprintf(buf + size, "0: %uMhz * (DPM >> disabled)\n", >> + now / 100); >> + break; >> + } >> >> for (i = 0; i < clocks.num_levels; i++) >> size += sprintf(buf + size, "%d: %uMhz %s\n", >> @@ -3171,10 +3169,11 @@ static int vega20_print_clock_levels(struct pp_hwmgr >> *hwmgr, >> "Attempt to get current socclk freq Failed!", >> return ret); >> >> - ret = vega20_get_socclocks(hwmgr, &clocks); >> - PP_ASSERT_WITH_CODE(!ret, >> - "Attempt to get soc clk levels Failed!", >> - return ret); >> + if (vega20_get_socclocks(hwmgr, &clocks)) { >> + size += sprintf(buf + size, "0: %uMhz * (DPM >> disabled)\n", >> + now / 100); >> + break; >> + } >> >> for (i = 0; i < clocks.num_levels; i++) >> size += sprintf(buf + size, "%d: %uMhz %s\n", >> @@ -3200,10 +3199,11 @@ static int vega20_print_clock_levels(struct pp_hwmgr >> *hwmgr, >> "Attempt to get current dcefclk freq Failed!", >> return ret); >> >> - ret = vega20_get_dcefclocks(hwmgr, &clocks); >> - PP_ASSERT_WITH_CODE(!ret, >> - "Attempt to get dcefclk levels Failed!", >> - return ret); >> + if (vega20_get_dcefclocks(hwmgr, &clocks)) { >> + size += sprintf(buf + size, "0: %uMhz * (DPM >> disabled)\n", >> + now / 100); >> + break; >> + } >> >> for (i = 0; i < clocks.num_levels; i++) >> size += sprintf(buf + size, "%d: %uMhz %s\n", _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
