Reviewed-by: Evan Quan <[email protected]>
> -----Original Message----- > From: amd-gfx <[email protected]> On Behalf Of Alex > Deucher > Sent: 2018年12月7日 0:29 > To: [email protected] > Cc: Deucher, Alexander <[email protected]> > Subject: [PATCH 3/3] drm/amdgpu/powerplay: check MC firmware for FFC > support > > Check if the MC firmware supports FFC and tell the SMC so mclk switching is > handled properly. > > Signed-off-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > index 6bfbfd37ed92..d94c7d03bf24 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > @@ -4222,9 +4222,17 @@ static int smu7_check_mc_firmware(struct > pp_hwmgr *hwmgr) > if (tmp & (1 << 23)) { > data->mem_latency_high = MEM_LATENCY_HIGH; > data->mem_latency_low = MEM_LATENCY_LOW; > + if ((hwmgr->chip_id == CHIP_POLARIS10) || > + (hwmgr->chip_id == CHIP_POLARIS11) || > + (hwmgr->chip_id == CHIP_POLARIS12)) > + smum_send_msg_to_smc(hwmgr, > PPSMC_MSG_EnableFFC); > } else { > data->mem_latency_high = 330; > data->mem_latency_low = 330; > + if ((hwmgr->chip_id == CHIP_POLARIS10) || > + (hwmgr->chip_id == CHIP_POLARIS11) || > + (hwmgr->chip_id == CHIP_POLARIS12)) > + smum_send_msg_to_smc(hwmgr, > PPSMC_MSG_DisableFFC); > } > > return 0; > -- > 2.13.6 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
