> -----Original Message-----
> From: amd-gfx [mailto:[email protected]] On Behalf
> Of [email protected]
> Sent: Wednesday, October 10, 2018 1:50 AM
> To: [email protected]
> Cc: Li, Sun peng (Leo) <[email protected]>; Wu, Hersen
> <[email protected]>; Wentland, Harry <[email protected]>;
> Li, Roman <[email protected]>
> Subject: [PATCH 1/2] drm/amd/display: Fix warning storm on Raven2
> 
> From: Roman Li <[email protected]>
> 
> [Why]
> Wrong index for pstate debug test register
> 
> [How]
> Add correct index value for dcn1_01 in hubbub1_construct()
> 
> Signed-off-by: Hersen Wu <[email protected]>
> Signed-off-by: Roman Li <[email protected]>

Thanks, Roman.

Series are also
Reviewed-by: Huang Rui <[email protected]>

I will apply them directly to drm-next and dkms-4.18 for testing.

Thanks,
Ray     

> ---
>  .../gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c    | 43
> +++++++++++++++++++++-
>  1 file changed, 41 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
> b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
> index 69345ce6..4254e7e 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubbub.c
> @@ -133,7 +133,43 @@ bool hubbub1_verify_allow_pstate_change_high(
>               forced_pstate_allow = false;
>       }
> 
> -     /* RV1:
> +     /* RV2:
> +      * dchubbubdebugind, at: 0xB
> +      * description
> +      * 0:     Pipe0 Plane0 Allow Pstate Change
> +      * 1:     Pipe0 Plane1 Allow Pstate Change
> +      * 2:     Pipe0 Cursor0 Allow Pstate Change
> +      * 3:     Pipe0 Cursor1 Allow Pstate Change
> +      * 4:     Pipe1 Plane0 Allow Pstate Change
> +      * 5:     Pipe1 Plane1 Allow Pstate Change
> +      * 6:     Pipe1 Cursor0 Allow Pstate Change
> +      * 7:     Pipe1 Cursor1 Allow Pstate Change
> +      * 8:     Pipe2 Plane0 Allow Pstate Change
> +      * 9:     Pipe2 Plane1 Allow Pstate Change
> +      * 10:    Pipe2 Cursor0 Allow Pstate Change
> +      * 11:    Pipe2 Cursor1 Allow Pstate Change
> +      * 12:    Pipe3 Plane0 Allow Pstate Change
> +      * 13:    Pipe3 Plane1 Allow Pstate Change
> +      * 14:    Pipe3 Cursor0 Allow Pstate Change
> +      * 15:    Pipe3 Cursor1 Allow Pstate Change
> +      * 16:    Pipe4 Plane0 Allow Pstate Change
> +      * 17:    Pipe4 Plane1 Allow Pstate Change
> +      * 18:    Pipe4 Cursor0 Allow Pstate Change
> +      * 19:    Pipe4 Cursor1 Allow Pstate Change
> +      * 20:    Pipe5 Plane0 Allow Pstate Change
> +      * 21:    Pipe5 Plane1 Allow Pstate Change
> +      * 22:    Pipe5 Cursor0 Allow Pstate Change
> +      * 23:    Pipe5 Cursor1 Allow Pstate Change
> +      * 24:    Pipe6 Plane0 Allow Pstate Change
> +      * 25:    Pipe6 Plane1 Allow Pstate Change
> +      * 26:    Pipe6 Cursor0 Allow Pstate Change
> +      * 27:    Pipe6 Cursor1 Allow Pstate Change
> +      * 28:    WB0 Allow Pstate Change
> +      * 29:    WB1 Allow Pstate Change
> +      * 30:    Arbiter's allow_pstate_change
> +      * 31:    SOC pstate change request"
> +      *
> +      * RV1:
>        * dchubbubdebugind, at: 0x7
>        * description "3-0:   Pipe0 cursor0 QOS
>        * 7-4:   Pipe1 cursor0 QOS
> @@ -157,7 +193,6 @@ bool hubbub1_verify_allow_pstate_change_high(
>        * 31:    SOC pstate change request
>        */
> 
> -
>       REG_WRITE(DCHUBBUB_TEST_DEBUG_INDEX, hubbub-
> >debug_test_index_pstate);
> 
>       for (i = 0; i < pstate_wait_timeout_us; i++) { @@ -819,5 +854,9 @@
> void hubbub1_construct(struct hubbub *hubbub,
>       hubbub->masks = hubbub_mask;
> 
>       hubbub->debug_test_index_pstate = 0x7;
> +#if defined(CONFIG_DRM_AMD_DC_DCN1_01)
> +     if (ctx->dce_version == DCN_VERSION_1_01)
> +             hubbub->debug_test_index_pstate = 0xB; #endif
>  }
> 
> --
> 2.7.4
> 
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