From: Mikita Lipski <[email protected]>

[why]
HDMI and DVI share the same PHY clock and single link
DVI and HDMI both use 4 lanes, so they should be allowed
to be sharing the same clock source if all other parameters
are satisfied.

[how]
Change a check for general DVI to Dual DVI.

Change-Id: Ie1d4c283e9d0683186874ccbeb55b1e673c687ac
Signed-off-by: Mikita Lipski <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Acked-by: Leo Li <[email protected]>
---
 drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c 
b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index 0154013..f405a32 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -372,11 +372,11 @@ static bool is_sharable_clk_src(
                return false;
 
        if (dc_is_hdmi_signal(pipe_with_clk_src->stream->signal)
-                       && dc_is_dvi_signal(pipe->stream->signal))
+                       && dc_is_dual_link_signal(pipe->stream->signal))
                return false;
 
        if (dc_is_hdmi_signal(pipe->stream->signal)
-                       && dc_is_dvi_signal(pipe_with_clk_src->stream->signal))
+                       && 
dc_is_dual_link_signal(pipe_with_clk_src->stream->signal))
                return false;
 
        if (!resource_are_streams_timing_synchronizable(
-- 
2.7.4

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