On Tue, Apr 17, 2018 at 6:11 AM, Rex Zhu <[email protected]> wrote: > Signed-off-by: Rex Zhu <[email protected]>
Please include a patch description. E.g., Make sure to update the MCLK and SCLK flags when setting the VDDC flags due to dependencies. With that fixed: Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 16 ++++++++++------ > 1 file changed, 10 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > index 68aae09..720ac47 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c > @@ -4679,23 +4679,27 @@ static void smu7_check_dpm_table_updated(struct > pp_hwmgr *hwmgr) > > for (i=0; i < dep_table->count; i++) { > if (dep_table->entries[i].vddc != > odn_dep_table->entries[i].vddc) { > - data->need_update_smu7_dpm_table |= > DPMTABLE_OD_UPDATE_VDDC; > - break; > + data->need_update_smu7_dpm_table |= > DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_MCLK; > + return; > } > } > - if (i == dep_table->count) > + if (i == dep_table->count && data->need_update_smu7_dpm_table & > DPMTABLE_OD_UPDATE_VDDC) { > data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; > + data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_MCLK; > + } > > dep_table = table_info->vdd_dep_on_sclk; > odn_dep_table = (struct phm_ppt_v1_clock_voltage_dependency_table > *)&(odn_table->vdd_dependency_on_sclk); > for (i=0; i < dep_table->count; i++) { > if (dep_table->entries[i].vddc != > odn_dep_table->entries[i].vddc) { > - data->need_update_smu7_dpm_table |= > DPMTABLE_OD_UPDATE_VDDC; > - break; > + data->need_update_smu7_dpm_table |= > DPMTABLE_OD_UPDATE_VDDC | DPMTABLE_OD_UPDATE_SCLK; > + return; > } > } > - if (i == dep_table->count) > + if (i == dep_table->count && data->need_update_smu7_dpm_table & > DPMTABLE_OD_UPDATE_VDDC) { > data->need_update_smu7_dpm_table &= ~DPMTABLE_OD_UPDATE_VDDC; > + data->need_update_smu7_dpm_table |= DPMTABLE_OD_UPDATE_SCLK; > + } > } > > static int smu7_odn_edit_dpm_table(struct pp_hwmgr *hwmgr, > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
