> -----Original Message-----
> From: amd-gfx [mailto:[email protected]] On Behalf
> Of Vijendar Mukunda
> Sent: Monday, March 19, 2018 2:47 AM
> To: [email protected]
> Cc: Deucher, Alexander <[email protected]>; Mukunda,
> Vijendar <[email protected]>; Agrawal, Akshu
> <[email protected]>
> Subject: [PATCH] drm/amd/amdgpu: passing i2s instance value as platform
> data
> 
> i2s instance value is passed as platform data to dwc driver.
> this parameter will be useful to distinguish current i2s instance value when
> multiple i2s controller instances are created.
> 
> Signed-off-by: Vijendar Mukunda <[email protected]>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> index 6cca4d1..61d6cb9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c
> @@ -83,6 +83,8 @@
>  #define ACP_TIMEOUT_LOOP                     0x000000FF
>  #define ACP_DEVS                             4
>  #define ACP_SRC_ID                           162
> +#define I2S_SP_INSTANCE                              1
> +#define I2S_BT_INSTANCE                              2
> 

Please add the defines for I2S_SP_INSTANCE and I2S_BT_INSTANCE to the dws 
platform data header so you don't have to define them locally here.
With that fixed, the patch is:
Reviewed-by: Alex Deucher <[email protected]>

>  enum {
>       ACP_TILE_P1 = 0,
> @@ -347,6 +349,7 @@ static int acp_hw_init(void *handle)
>       i2s_pdata[0].snd_rates = SNDRV_PCM_RATE_8000_96000;
>       i2s_pdata[0].i2s_reg_comp1 = ACP_I2S_COMP1_PLAY_REG_OFFSET;
>       i2s_pdata[0].i2s_reg_comp2 = ACP_I2S_COMP2_PLAY_REG_OFFSET;
> +     i2s_pdata[0].i2s_instance = I2S_SP_INSTANCE;
>       switch (adev->asic_type) {
>       case CHIP_STONEY:
>               i2s_pdata[1].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET |
> @@ -362,6 +365,7 @@ static int acp_hw_init(void *handle)
>       i2s_pdata[1].snd_rates = SNDRV_PCM_RATE_8000_96000;
>       i2s_pdata[1].i2s_reg_comp1 = ACP_I2S_COMP1_CAP_REG_OFFSET;
>       i2s_pdata[1].i2s_reg_comp2 = ACP_I2S_COMP2_CAP_REG_OFFSET;
> +     i2s_pdata[1].i2s_instance = I2S_SP_INSTANCE;
> 
>       i2s_pdata[2].quirks = DW_I2S_QUIRK_COMP_REG_OFFSET;
>       switch (adev->asic_type) {
> @@ -376,6 +380,7 @@ static int acp_hw_init(void *handle)
>       i2s_pdata[2].snd_rates = SNDRV_PCM_RATE_8000_96000;
>       i2s_pdata[2].i2s_reg_comp1 = ACP_BT_COMP1_REG_OFFSET;
>       i2s_pdata[2].i2s_reg_comp2 = ACP_BT_COMP2_REG_OFFSET;
> +     i2s_pdata[2].i2s_instance = I2S_BT_INSTANCE;
> 
>       adev->acp.acp_res[0].name = "acp2x_dma";
>       adev->acp.acp_res[0].flags = IORESOURCE_MEM;
> --
> 2.7.4
> 
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