From: Andrew Jiang <[email protected]>

Program the DCC registers when dcc_change is true.

Signed-off-by: Andrew Jiang <[email protected]>
Reviewed-by: Tony Cheng <[email protected]>
Acked-by: Harry Wentland <[email protected]>
---
 drivers/gpu/drm/amd/display/dc/core/dc.c                  | 5 +++++
 drivers/gpu/drm/amd/display/dc/dc.h                       | 1 +
 drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 1 +
 3 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c 
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 19d96aeaa113..ab875ea8aba4 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -985,6 +985,11 @@ static enum surface_update_type 
get_plane_info_update_type(const struct dc_surfa
        if (u->plane_info->per_pixel_alpha != u->surface->per_pixel_alpha)
                update_flags->bits.per_pixel_alpha_change = 1;
 
+       if (u->plane_info->dcc.enable != u->surface->dcc.enable
+                       || u->plane_info->dcc.grph.independent_64b_blks != 
u->surface->dcc.grph.independent_64b_blks
+                       || u->plane_info->dcc.grph.meta_pitch != 
u->surface->dcc.grph.meta_pitch)
+               update_flags->bits.dcc_change = 1;
+
        if (pixel_format_to_bpp(u->plane_info->format) !=
                        pixel_format_to_bpp(u->surface->format))
                /* different bytes per element will require full bandwidth
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h 
b/drivers/gpu/drm/amd/display/dc/dc.h
index 9fbcfd7b5f8d..597bd8b4cb1e 100644
--- a/drivers/gpu/drm/amd/display/dc/dc.h
+++ b/drivers/gpu/drm/amd/display/dc/dc.h
@@ -387,6 +387,7 @@ union surface_update_flags {
 
        struct {
                /* Medium updates */
+               uint32_t dcc_change:1;
                uint32_t color_space_change:1;
                uint32_t input_tf_change:1;
                uint32_t horizontal_mirror_change:1;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c 
b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index 8e2520ba6bed..1ebe980bfb6d 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2066,6 +2066,7 @@ static void update_dchubp_dpp(
                plane_state->update_flags.bits.horizontal_mirror_change ||
                plane_state->update_flags.bits.rotation_change ||
                plane_state->update_flags.bits.swizzle_change ||
+               plane_state->update_flags.bits.dcc_change ||
                plane_state->update_flags.bits.bpp_change) {
                hubp->funcs->hubp_program_surface_config(
                        hubp,
-- 
2.14.1

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