Similar to the CPU address space the VA on Vega10 has a hole in it.

v2: use dev_dbg instead of dev_err

Signed-off-by: Christian König <[email protected]>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c  | 10 +++++-----
 drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 11 +++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c |  4 +++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h  |  5 +++++
 4 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
index ee7736419411..fea4429d3f72 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
@@ -869,8 +869,8 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
                        struct amdgpu_bo_va_mapping *m;
                        struct amdgpu_bo *aobj = NULL;
                        struct amdgpu_cs_chunk *chunk;
+                       uint64_t offset, va_start;
                        struct amdgpu_ib *ib;
-                       uint64_t offset;
                        uint8_t *kptr;
 
                        chunk = &p->chunks[i];
@@ -880,14 +880,14 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device 
*adev,
                        if (chunk->chunk_id != AMDGPU_CHUNK_ID_IB)
                                continue;
 
-                       r = amdgpu_cs_find_mapping(p, chunk_ib->va_start,
-                                                  &aobj, &m);
+                       va_start = chunk_ib->va_start & AMDGPU_VA_HOLE_MASK;
+                       r = amdgpu_cs_find_mapping(p, va_start, &aobj, &m);
                        if (r) {
                                DRM_ERROR("IB va_start is invalid\n");
                                return r;
                        }
 
-                       if ((chunk_ib->va_start + chunk_ib->ib_bytes) >
+                       if ((va_start + chunk_ib->ib_bytes) >
                            (m->last + 1) * AMDGPU_GPU_PAGE_SIZE) {
                                DRM_ERROR("IB va_start+ib_bytes is invalid\n");
                                return -EINVAL;
@@ -900,7 +900,7 @@ static int amdgpu_cs_ib_vm_chunk(struct amdgpu_device *adev,
                        }
 
                        offset = m->start * AMDGPU_GPU_PAGE_SIZE;
-                       kptr += chunk_ib->va_start - offset;
+                       kptr += va_start - offset;
 
                        memcpy(ib->ptr, kptr, chunk_ib->ib_bytes);
                        amdgpu_bo_kunmap(aobj);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
index 04ddd782bf6d..432ec2924dc5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
@@ -566,6 +566,17 @@ int amdgpu_gem_va_ioctl(struct drm_device *dev, void *data,
                return -EINVAL;
        }
 
+       if (args->va_address >= AMDGPU_VA_HOLE_START &&
+           args->va_address < AMDGPU_VA_HOLE_END) {
+               dev_dbg(&dev->pdev->dev,
+                       "va_address 0x%LX is in VA hole 0x%LX-0x%LX\n",
+                       args->va_address, AMDGPU_VA_HOLE_START,
+                       AMDGPU_VA_HOLE_END);
+               return -EINVAL;
+       }
+
+       args->va_address &= AMDGPU_VA_HOLE_MASK;
+
        if ((args->flags & ~valid_flags) && (args->flags & ~prt_flags)) {
                dev_err(&dev->pdev->dev, "invalid flags combination 0x%08X\n",
                        args->flags);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index 65360cde5342..e84a7f7f642e 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -578,7 +578,9 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void 
*data, struct drm_file
                if (amdgpu_sriov_vf(adev))
                        dev_info.ids_flags |= AMDGPU_IDS_FLAGS_PREEMPTION;
                dev_info.virtual_address_offset = AMDGPU_VA_RESERVED_SIZE;
-               dev_info.virtual_address_max = 
(uint64_t)adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE;
+               dev_info.virtual_address_max =
+                       min(adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE,
+                           AMDGPU_VA_HOLE_START);
                dev_info.virtual_address_alignment = max((int)PAGE_SIZE, 
AMDGPU_GPU_PAGE_SIZE);
                dev_info.pte_fragment_size = (1 << 
adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE;
                dev_info.gart_page_size = AMDGPU_GPU_PAGE_SIZE;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
index e8f8896d18db..31cd57592546 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h
@@ -96,6 +96,11 @@ struct amdgpu_bo_list_entry;
 /* hardcode that limit for now */
 #define AMDGPU_VA_RESERVED_SIZE                        (8ULL << 20)
 
+/* VA hole for 48bit addresses on Vega10 */
+#define AMDGPU_VA_HOLE_START                   0x0000800000000000ULL
+#define AMDGPU_VA_HOLE_END                     0xffff800000000000ULL
+#define AMDGPU_VA_HOLE_MASK                    0x0000ffffffffffffULL
+
 /* max vmids dedicated for process */
 #define AMDGPU_VM_MAX_RESERVED_VMID    1
 
-- 
2.11.0

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