The queue reset path already resolves the affected queue directly from the doorbell and funnels successful reset handling through amdgpu_userq_handle_hung_queue(). Reuse that common handling point to create the corresponding WAIT_EVENT record.
Keeping the notification in the common helper ensures that queue state is updated before userspace is notified and that both EVENTFD and WAIT_EVENT observe the same reset. It also avoids duplicating the doorbell lookup or adding a queue scan in the MES reset path. No MES or GFX interrupt changes are needed. Changes since v9: - Document the existing USERQ-before-postclose teardown ordering in the WAIT_EVENT manager patch to clarify the manager lifetime used by this reset producer. Signed-off-by: Srinivasan Shanmugam <[email protected]> Reviewed-by: Alex Deucher <[email protected]> --- drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c index 28f9d3fe0e80..37be0414fea7 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_userq.c @@ -166,6 +166,7 @@ void amdgpu_userq_handle_hung_queue(struct amdgpu_device *adev, struct amdgpu_usermode_queue *queue) { struct amdgpu_eventfd_mgr *eventfd_mgr; + struct amdgpu_wait_event_mgr *wait_event_mgr; queue->state = AMDGPU_USERQ_STATE_HUNG; atomic_inc(&adev->gpu_reset_counter); @@ -177,6 +178,11 @@ void amdgpu_userq_handle_hung_queue(struct amdgpu_device *adev, DRM_AMDGPU_EVENT_TYPE_QUEUE_RESET, queue); + wait_event_mgr = amdgpu_userq_wait_event_mgr(queue->userq_mgr); + amdgpu_wait_event_add(wait_event_mgr, + DRM_AMDGPU_EVENT_TYPE_QUEUE_RESET, + queue); + drm_dev_wedged_event(adev_to_drm(adev), DRM_WEDGE_RECOVERY_NONE, NULL); } -- 2.34.1
