This is for retry init. If the driver fails before late_init, the IRQ handler is not registered then. We need to know if the FLR is done at this point. I think maybe we also can leverage this interface to handle some special cases in future. Any concern about it? — Sincerely Yours, Pixel
On 23/10/2017, 7:01 PM, "Liu, Monk" <[email protected]> wrote: >I don't see this is a necessary patch, driver already have the implement to >check if VF FLR is completed or not, see "xgpu_ai/vi_mailbox_flr_work()" > >Driver won't do gpu reset until this function received the NOTIFICATION_CMPL >message > >Do you have any particular reason to add this wait_reset ? if so please send >out the patch that use this interface > >BR Monk > >-----Original Message----- >From: amd-gfx [mailto:[email protected]] On Behalf Of >Pixel Ding >Sent: 2017年10月23日 18:04 >To: [email protected] >Cc: Sun, Gary <[email protected]>; Ding, Pixel <[email protected]>; Li, >Bingley <[email protected]> >Subject: [PATCH 6/7] drm/amdgpu/virt: add wait_reset virt ops > >From: pding <[email protected]> > >Driver can use this interface to check if there's a function level reset done >in hypervisor. > >Signed-off-by: pding <[email protected]> >--- > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 16 ++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++ > drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 1 + > drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c | 6 ++++++ > 4 files changed, 25 insertions(+) > >diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c >b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c >index 33dac7e..6a4a901 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c >@@ -231,6 +231,22 @@ int amdgpu_virt_reset_gpu(struct amdgpu_device *adev) } > > /** >+ * amdgpu_virt_wait_reset() - wait for reset gpu completed >+ * @amdgpu: amdgpu device. >+ * Wait for GPU reset completed. >+ * Return: Zero if reset success, otherwise will return error. >+ */ >+int amdgpu_virt_wait_reset(struct amdgpu_device *adev) { >+ struct amdgpu_virt *virt = &adev->virt; >+ >+ if (!virt->ops || !virt->ops->wait_reset) >+ return -EINVAL; >+ >+ return virt->ops->wait_reset(adev); >+} >+ >+/** > * amdgpu_virt_alloc_mm_table() - alloc memory for mm table > * @amdgpu: amdgpu device. > * MM table is used by UVD and VCE for its initialization diff --git > a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h >index 81efb9d..d149aca 100644 >--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h >+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h >@@ -55,6 +55,7 @@ struct amdgpu_virt_ops { > int (*req_full_gpu)(struct amdgpu_device *adev, bool init); > int (*rel_full_gpu)(struct amdgpu_device *adev, bool init); > int (*reset_gpu)(struct amdgpu_device *adev); >+ int (*wait_reset)(struct amdgpu_device *adev); > void (*trans_msg)(struct amdgpu_device *adev, u32 req, u32 data1, u32 > data2, u32 data3); }; > >@@ -286,6 +287,7 @@ void amdgpu_virt_kiq_wreg(struct amdgpu_device *adev, >uint32_t reg, uint32_t v); int amdgpu_virt_request_full_gpu(struct >amdgpu_device *adev, bool init); int amdgpu_virt_release_full_gpu(struct >amdgpu_device *adev, bool init); int amdgpu_virt_reset_gpu(struct >amdgpu_device *adev); >+int amdgpu_virt_wait_reset(struct amdgpu_device *adev); > int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job > *job); int amdgpu_virt_alloc_mm_table(struct amdgpu_device *adev); void > amdgpu_virt_free_mm_table(struct amdgpu_device *adev); diff --git > a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c > b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >index b4906d2..f91aab3 100644 >--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >@@ -353,5 +353,6 @@ const struct amdgpu_virt_ops xgpu_ai_virt_ops = { > .req_full_gpu = xgpu_ai_request_full_gpu_access, > .rel_full_gpu = xgpu_ai_release_full_gpu_access, > .reset_gpu = xgpu_ai_request_reset, >+ .wait_reset = NULL, > .trans_msg = xgpu_ai_mailbox_trans_msg, }; diff --git > a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c > b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c >index c25a831..27b03c7 100644 >--- a/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c >+++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_vi.c >@@ -458,6 +458,11 @@ static int xgpu_vi_request_reset(struct amdgpu_device >*adev) > return xgpu_vi_send_access_requests(adev, IDH_REQ_GPU_RESET_ACCESS); } > >+static int xgpu_vi_wait_reset_cmpl(struct amdgpu_device *adev) { >+ return xgpu_vi_poll_msg(adev, IDH_FLR_NOTIFICATION_CMPL); } >+ > static int xgpu_vi_request_full_gpu_access(struct amdgpu_device *adev, > bool init) > { >@@ -613,5 +618,6 @@ const struct amdgpu_virt_ops xgpu_vi_virt_ops = { > .req_full_gpu = xgpu_vi_request_full_gpu_access, > .rel_full_gpu = xgpu_vi_release_full_gpu_access, > .reset_gpu = xgpu_vi_request_reset, >+ .wait_reset = xgpu_vi_wait_reset_cmpl, > .trans_msg = NULL, /* Does not need to trans VF errors to > host. */ > }; >-- >2.9.5 > >_______________________________________________ >amd-gfx mailing list >[email protected] >https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
