Re: [PATCH v2] drm/amd/pm: adjust the visibility of pp_table sysfs node

[Lazar, Lijo]

On 11/20/2025 2:04 PM, Yang Wang wrote:
v1:
- make pp_table invisible on VF mode (only valid on BM)
- make pp_table invisible on Mi* chips (Not supported)
- make pp_table invisible if scpm feature is enabled.

v2:
move pp_table invisible code logic into amdgpu_dpm_get_pp_table() function.

Signed-off-by: Yang Wang <kevinyang.w...@amd.com>
---
  drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 12 +++++++++---
  drivers/gpu/drm/amd/pm/amdgpu_pm.c  |  8 +++++++-
  2 files changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
index c6f55d3522cd..79b174e5326d 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_dpm.c
@@ -1187,8 +1187,11 @@ int amdgpu_dpm_get_pp_table(struct amdgpu_device *adev, 
char **table)
        const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
        int ret = 0;
  
-	if (!pp_funcs->get_pp_table)
-               return 0;
+       if (!table)
+               return -EINVAL;
+
+       if (amdgpu_sriov_vf(adev) || !pp_funcs->get_pp_table || 
adev->scpm_enabled)
+               return -EOPNOTSUPP;
  

!smu_table->power_play_table && !smu_table->hardcode_pptable

!hwmgr->soft_pp_table

I think these checks also may be required in smu and powerplay manager 
callbacks to return -EOPNOTSUPP.

Thanks,
Lijo

        mutex_lock(&adev->pm.mutex);
        ret = pp_funcs->get_pp_table(adev->powerplay.pp_handle,
@@ -1715,7 +1718,10 @@ int amdgpu_dpm_set_pp_table(struct amdgpu_device *adev,
        const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs;
        int ret = 0;
  
-	if (!pp_funcs->set_pp_table)
+       if (!buf || !size)
+               return -EINVAL;
+
+       if (amdgpu_sriov_vf(adev) || !pp_funcs->set_pp_table || 
adev->scpm_enabled)
                return -EOPNOTSUPP;
  
  	mutex_lock(&adev->pm.mutex);
diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c 
b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
index 2a9467fe86db..cbaa6cd1a983 100644
--- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c
+++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c
@@ -2560,7 +2560,7 @@ static struct amdgpu_device_attr amdgpu_device_attrs[] = {
        AMDGPU_DEVICE_ATTR_RO(pp_num_states,                            
ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RO(pp_cur_state,                             
ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
        AMDGPU_DEVICE_ATTR_RW(pp_force_state,                           
ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
-       AMDGPU_DEVICE_ATTR_RW(pp_table,                                 
ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF),
+       AMDGPU_DEVICE_ATTR_RW(pp_table,                                 
ATTR_FLAG_BASIC),
        AMDGPU_DEVICE_ATTR_RW(pp_dpm_sclk,                              
ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,
                              .attr_update = pp_dpm_clk_default_attr_update),
        AMDGPU_DEVICE_ATTR_RW(pp_dpm_mclk,                              
ATTR_FLAG_BASIC|ATTR_FLAG_ONEVF,
@@ -2692,6 +2692,12 @@ static int default_attr_update(struct amdgpu_device 
*adev, struct amdgpu_device_
                if (amdgpu_dpm_get_apu_thermal_limit(adev, &limit) ==
                    -EOPNOTSUPP)
                        *states = ATTR_STATE_UNSUPPORTED;
+       } else if (DEVICE_ATTR_IS(pp_table)) {
+               char *tmp = NULL;
+               if (amdgpu_dpm_get_pp_table(adev, &tmp) == -EOPNOTSUPP)
+                       *states = ATTR_STATE_UNSUPPORTED;
+               else
+                       *states = ATTR_STATE_SUPPORTED;
        }
  
  	switch (gc_ver) {