[AMD Official Use Only - AMD Internal Distribution Only] -----Original Message----- From: Alex Deucher <[email protected]> Sent: Saturday, August 9, 2025 3:48 AM To: Zhang, Jesse(Jie) <[email protected]> Cc: [email protected]; Deucher, Alexander <[email protected]>; Koenig, Christian <[email protected]> Subject: Re: [v7 03/11] drm/amd/amdgpu: Implement MES suspend/resume gang functionality for v12
On Tue, Aug 5, 2025 at 10:54 PM Jesse.Zhang <[email protected]> wrote: > > This commit implements the actual MES (Micro Engine Scheduler) suspend > and resume gang operations for version 12 hardware. Previously these > functions were just stubs returning success. > > v2: Always use AMDGPU_MES_SCHED_PIPE > What about the MES implementation for v11? v11 already has this implemented. Thanks Jesse Alex > Signed-off-by: Alex Deucher <[email protected]> > Signed-off-by: Jesse Zhang <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 32 > ++++++++++++++++++++++++-- > 1 file changed, 30 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c > b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c > index 6b222630f3fa..24c61239b25d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c > @@ -567,13 +567,41 @@ static int mes_v12_0_unmap_legacy_queue(struct > amdgpu_mes *mes, static int mes_v12_0_suspend_gang(struct amdgpu_mes *mes, > struct mes_suspend_gang_input > *input) { > - return 0; > + union MESAPI__SUSPEND mes_suspend_gang_pkt; > + > + memset(&mes_suspend_gang_pkt, 0, > + sizeof(mes_suspend_gang_pkt)); > + > + mes_suspend_gang_pkt.header.type = MES_API_TYPE_SCHEDULER; > + mes_suspend_gang_pkt.header.opcode = MES_SCH_API_SUSPEND; > + mes_suspend_gang_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS; > + > + mes_suspend_gang_pkt.suspend_all_gangs = input->suspend_all_gangs; > + mes_suspend_gang_pkt.gang_context_addr = input->gang_context_addr; > + mes_suspend_gang_pkt.suspend_fence_addr = input->suspend_fence_addr; > + mes_suspend_gang_pkt.suspend_fence_value = > + input->suspend_fence_value; > + > + return mes_v12_0_submit_pkt_and_poll_completion(mes, > AMDGPU_MES_SCHED_PIPE, > + &mes_suspend_gang_pkt, sizeof(mes_suspend_gang_pkt), > + offsetof(union MESAPI__SUSPEND, api_status)); > } > > static int mes_v12_0_resume_gang(struct amdgpu_mes *mes, > struct mes_resume_gang_input *input) > { > - return 0; > + union MESAPI__RESUME mes_resume_gang_pkt; > + > + memset(&mes_resume_gang_pkt, 0, sizeof(mes_resume_gang_pkt)); > + > + mes_resume_gang_pkt.header.type = MES_API_TYPE_SCHEDULER; > + mes_resume_gang_pkt.header.opcode = MES_SCH_API_RESUME; > + mes_resume_gang_pkt.header.dwsize = API_FRAME_SIZE_IN_DWORDS; > + > + mes_resume_gang_pkt.resume_all_gangs = input->resume_all_gangs; > + mes_resume_gang_pkt.gang_context_addr = > + input->gang_context_addr; > + > + return mes_v12_0_submit_pkt_and_poll_completion(mes, > AMDGPU_MES_SCHED_PIPE, > + &mes_resume_gang_pkt, sizeof(mes_resume_gang_pkt), > + offsetof(union MESAPI__RESUME, api_status)); > } > > static int mes_v12_0_query_sched_status(struct amdgpu_mes *mes, int > pipe) > -- > 2.49.0 >
