[Public] Hi Lijo,
As per discussion offline, understood the requirement. Will drop this patch and send a fresh one as discussed later. Thanks & Regards Asad From: Lazar, Lijo <[email protected]> Sent: Tuesday, August 5, 2025 9:54 PM To: Kamal, Asad <[email protected]>; [email protected] Cc: Zhang, Hawking <[email protected]>; Ma, Le <[email protected]>; Zhang, Morris <[email protected]>; Deucher, Alexander <[email protected]>; Kamal, Asad <[email protected]> Subject: Re: [PATCH v2] drm/amd/pm: Increase cache interval time [Public] Hi Asad, Sorry, after initing the cache interval time, I meant to move the cache time check logic to swsmu level and not at smu v13.0.12. I believe this was the original ask from Alex. Other SOCs can customize if required by adjusting the cache interval. Thanks, Lijo ________________________________ From: Kamal, Asad <[email protected]<mailto:[email protected]>> Sent: Tuesday, August 5, 2025 9:20:58 PM To: [email protected]<mailto:[email protected]> <[email protected]<mailto:[email protected]>>; Lazar, Lijo <[email protected]<mailto:[email protected]>> Cc: Zhang, Hawking <[email protected]<mailto:[email protected]>>; Ma, Le <[email protected]<mailto:[email protected]>>; Zhang, Morris <[email protected]<mailto:[email protected]>>; Deucher, Alexander <[email protected]<mailto:[email protected]>>; Kamal, Asad <[email protected]<mailto:[email protected]>> Subject: [PATCH v2] drm/amd/pm: Increase cache interval time Increase cache interval time to 50 ms while fetching system metrics table for smu_v13_0_12 since polling interval is less frequent for this data. v2: Make caching interval soc independent, however customization can be done in soc specific callbacks(Alex/Lijo) Signed-off-by: Asad Kamal <[email protected]<mailto:[email protected]>> --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 ++++ drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +++ drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c | 9 ++++----- 3 files changed, 11 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c index dc48a1dd8be4..c62d68d7410f 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c +++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c @@ -1162,8 +1162,12 @@ static void smu_free_dummy_read_table(struct smu_context *smu) static int smu_smc_table_sw_init(struct smu_context *smu) { + struct smu_table_context *smu_table = &smu->smu_table; int ret; + smu_table->tables[SMU_TABLE_TEMP_METRICS].cache_interval = + AMDGPU_TEMP_METRICS_CACHE_INTERVAL; + /** * Create smu_table structure, and init smc tables such as * TABLE_PPTABLE, TABLE_WATERMARKS, TABLE_SMU_METRICS, and etc. diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h index 611b381b9147..7a52c00c700e 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h +++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h @@ -32,6 +32,8 @@ #include "smu_types.h" #include "linux/firmware.h" +#define AMDGPU_TEMP_METRICS_CACHE_INTERVAL 50 + #define SMU_THERMAL_MINIMUM_ALERT_TEMP 0 #define SMU_THERMAL_MAXIMUM_ALERT_TEMP 255 #define SMU_TEMPERATURE_UNITS_PER_CENTIGRADES 1000 @@ -258,6 +260,7 @@ struct smu_table { struct amdgpu_bo *bo; uint32_t version; unsigned long metrics_time; + uint32_t cache_interval; }; enum smu_perf_level_designation { diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c index fca50f6a8ef6..5ead66375d38 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_12_ppt.c @@ -361,18 +361,17 @@ int smu_v13_0_12_get_smu_metrics_data(struct smu_context *smu, return 0; } -static int smu_v13_0_12_get_system_metrics_table(struct smu_context *smu, void *metrics_table, - bool bypass_cache) +static int smu_v13_0_12_get_system_metrics_table(struct smu_context *smu, void *metrics_table) { struct smu_table_context *smu_table = &smu->smu_table; uint32_t table_size = smu_table->tables[SMU_TABLE_SMU_METRICS].size; struct smu_table *table = &smu_table->driver_table; int ret; - if (bypass_cache || !smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time || + if (!smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time || time_after(jiffies, smu_table->tables[SMU_TABLE_TEMP_METRICS].metrics_time + - msecs_to_jiffies(1))) { + msecs_to_jiffies(smu_table->tables[SMU_TABLE_TEMP_METRICS].cache_interval))) { ret = smu_cmn_send_smc_msg(smu, SMU_MSG_GetSystemMetricsTable, NULL); if (ret) { dev_info(smu->adev->dev, @@ -544,7 +543,7 @@ static ssize_t smu_v13_0_12_get_temp_metrics(struct smu_context *smu, else if (type == SMU_TEMP_METRIC_BASEBOARD) smu_cmn_init_baseboard_temp_metrics(baseboard_temp_metrics, 1, 0); - ret = smu_v13_0_12_get_system_metrics_table(smu, metrics, false); + ret = smu_v13_0_12_get_system_metrics_table(smu, metrics); if (ret) { kfree(metrics); return ret; -- 2.46.0
