On Tue, Jul 15, 2025 at 5:49 AM Lazar, Lijo <[email protected]> wrote: > > <ping> > > On 7/14/2025 10:52 AM, Lijo Lazar wrote: > > Increment the reset counter only if soft recovery succeeded. This is > > consistent with a ring hard reset behaviour where counter gets > > incremented only if hard reset succeeded. > > > > Signed-off-by: Lijo Lazar <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > > --- > > drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 9 +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > > b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > > index 426834806fbf..6ac0ce361a2d 100644 > > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c > > @@ -427,6 +427,7 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring > > *ring, unsigned int vmid, > > { > > unsigned long flags; > > ktime_t deadline; > > + bool ret; > > > > if (unlikely(ring->adev->debug_disable_soft_recovery)) > > return false; > > @@ -441,12 +442,16 @@ bool amdgpu_ring_soft_recovery(struct amdgpu_ring > > *ring, unsigned int vmid, > > dma_fence_set_error(fence, -ENODATA); > > spin_unlock_irqrestore(fence->lock, flags); > > > > - atomic_inc(&ring->adev->gpu_reset_counter); > > while (!dma_fence_is_signaled(fence) && > > ktime_to_ns(ktime_sub(deadline, ktime_get())) > 0) > > ring->funcs->soft_recovery(ring, vmid); > > > > - return dma_fence_is_signaled(fence); > > + ret = dma_fence_is_signaled(fence); > > + /* increment the counter only if soft reset worked */ > > + if (ret) > > + atomic_inc(&ring->adev->gpu_reset_counter); > > + > > + return ret; > > } > > > > /* >
