[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Tao Zhou <[email protected]>
> -----Original Message----- > From: Chai, Thomas <[email protected]> > Sent: Monday, July 14, 2025 10:21 AM > To: [email protected] > Cc: Zhang, Hawking <[email protected]>; Zhou1, Tao > <[email protected]> > Subject: RE: [PATCH] drm/amdgpu: query the allocated vram address block info > > [AMD Official Use Only - AMD Internal Distribution Only] > > Ping..... > > -----Original Message----- > From: Chai, Thomas <[email protected]> > Sent: Thursday, July 10, 2025 2:44 PM > To: [email protected] > Cc: Chai, Thomas <[email protected]>; Zhang, Hawking > <[email protected]>; Zhou1, Tao <[email protected]>; Chai, Thomas > <[email protected]> > Subject: [PATCH] drm/amdgpu: query the allocated vram address block info > > The bad pages that need to be retired are not all allocated in the same poison > consumption process, so an interface is needed to query the processes that > allocate > the bad pages. > By killing all the processes that allocate the bad pages, the bad pages can be > reserved immediately. > > Signed-off-by: YiPeng Chai <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c | 38 ++++++++++++++++++++ > drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 17 +++++++++ > 2 files changed, 55 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > index abdc52b0895a..4bf3e99f47fe 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c > @@ -396,6 +396,35 @@ int amdgpu_vram_mgr_query_page_status(struct > amdgpu_vram_mgr *mgr, > return ret; > } > > +int amdgpu_vram_mgr_query_address_block_info(struct amdgpu_vram_mgr *mgr, > + uint64_t address, struct amdgpu_vram_block_info > *info) { > + struct amdgpu_vram_mgr_resource *vres; > + struct drm_buddy_block *block; > + u64 start, size; > + int ret = -ENOENT; > + > + mutex_lock(&mgr->lock); > + list_for_each_entry(vres, &mgr->allocated_vres_list, vres_node) { > + list_for_each_entry(block, &vres->blocks, link) { > + start = amdgpu_vram_mgr_block_start(block); > + size = amdgpu_vram_mgr_block_size(block); > + if ((start <= address) && (address < (start + size))) > { > + info->start = start; > + info->size = size; > + memcpy(&info->task, &vres->task, > sizeof(vres->task)); > + ret = 0; > + goto out; > + } > + } > + } > + > +out: > + mutex_unlock(&mgr->lock); > + > + return ret; > +} > + > static void amdgpu_dummy_vram_mgr_debug(struct ttm_resource_manager *man, > struct drm_printer *printer) { @@ -568,6 > +597,10 @@ static int > amdgpu_vram_mgr_new(struct ttm_resource_manager *man, > remaining_size -= size; > } > > + vres->task.pid = task_pid_nr(current); > + get_task_comm(vres->task.comm, current); > + list_add_tail(&vres->vres_node, &mgr->allocated_vres_list); > + > if (bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS && > adjust_dcc_size) { > struct drm_buddy_block *dcc_block; > unsigned long dcc_start; @@ -645,6 +678,10 @@ static void > amdgpu_vram_mgr_del(struct ttm_resource_manager *man, > uint64_t vis_usage = 0; > > mutex_lock(&mgr->lock); > + > + list_del(&vres->vres_node); > + memset(&vres->task, 0, sizeof(vres->task)); > + > list_for_each_entry(block, &vres->blocks, link) > vis_usage += amdgpu_vram_mgr_vis_size(adev, block); > > @@ -917,6 +954,7 @@ int amdgpu_vram_mgr_init(struct amdgpu_device *adev) > mutex_init(&mgr->lock); > INIT_LIST_HEAD(&mgr->reservations_pending); > INIT_LIST_HEAD(&mgr->reserved_pages); > + INIT_LIST_HEAD(&mgr->allocated_vres_list); > mgr->default_page_size = PAGE_SIZE; > > if (!adev->gmc.is_app_apu) { > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h > b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h > index b256cbc2bc27..f5ac0eeb092c 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h > @@ -35,12 +35,26 @@ struct amdgpu_vram_mgr { > struct list_head reserved_pages; > atomic64_t vis_usage; > u64 default_page_size; > + struct list_head allocated_vres_list; }; > + > +struct amdgpu_vres_task { > + pid_t pid; > + char comm[TASK_COMM_LEN]; > +}; > + > +struct amdgpu_vram_block_info { > + u64 start; > + u64 size; > + struct amdgpu_vres_task task; > }; > > struct amdgpu_vram_mgr_resource { > struct ttm_resource base; > struct list_head blocks; > unsigned long flags; > + struct list_head vres_node; > + struct amdgpu_vres_task task; > }; > > static inline u64 amdgpu_vram_mgr_block_start(struct drm_buddy_block *block) > @@ -69,4 +83,7 @@ static inline void amdgpu_vram_mgr_set_cleared(struct > ttm_resource *res) > to_amdgpu_vram_mgr_resource(res)->flags |= DRM_BUDDY_CLEARED; } > > +int amdgpu_vram_mgr_query_address_block_info(struct amdgpu_vram_mgr *mgr, > + uint64_t address, struct amdgpu_vram_block_info *info); > + > #endif > -- > 2.34.1 >
