hmm... I knew that - but I would rather add that in case
jpeg_v1_0_start() might change.
A little conservative ...
Thanks,
David
On 5/14/2025 1:33 PM, Dong, Ruijing wrote:
[AMD Official Use Only - AMD Internal Distribution Only]
This patch is not needed as it has the read-back in jpeg_v1_0_start();
Thanks,
Ruijing
-----Original Message-----
From: Wu, David<[email protected]>
Sent: Wednesday, May 14, 2025 1:23 PM
To:[email protected]; Deucher, Alexander<[email protected]>
Cc: Koenig, Christian<[email protected]>; Liu, Leo<[email protected]>; Jiang,
Sonny<[email protected]>; Dong, Ruijing<[email protected]>
Subject: [PATCH v1 1/8] drm/amdgpu: read back register after written
The addition of register read-back in VCN v1.0 is intended to prevent potential
race conditions.
Signed-off-by: David (Ming Qiang) Wu<[email protected]>
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
index 21b57c29bf7d..f56b623713c9 100644
--- a/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
@@ -1009,6 +1009,11 @@ static int vcn_v1_0_start_spg_mode(struct
amdgpu_vcn_inst *vinst)
jpeg_v1_0_start(adev, 0);
+ /* Keeping one read-back to ensure all register writes are done,
otherwise
+ * it may introduce race conditions
+ */
+ RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR);
+
return 0;
}
@@ -1154,6 +1159,11 @@ static int vcn_v1_0_start_dpg_mode(struct
amdgpu_vcn_inst *vinst)
jpeg_v1_0_start(adev, 1);
+ /* Keeping one read-back to ensure all register writes are done,
otherwise
+ * it may introduce race conditions
+ */
+ RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_WPTR);
+
return 0;
}
--
2.49.0
