On 3/14/2025 3:24 PM, Flora Cui wrote:
> From: Alex Deucher <[email protected]>
>
> On chips without native IP discovery support, use the fw binary
> if available, otherwise we can continue without it.
>
> Signed-off-by: Alex Deucher <[email protected]>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 38 +++++++++++++++----
> 1 file changed, 30 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> index fff438baf64b..cf286fde18d5 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
> @@ -2536,6 +2536,36 @@ int amdgpu_discovery_set_ip_blocks(struct
> amdgpu_device *adev)
> {
> int r;
>
> + switch (adev->asic_type) {
> + case CHIP_VEGA10:
> + case CHIP_VEGA12:
> + case CHIP_RAVEN:
> + case CHIP_VEGA20:
> + case CHIP_ARCTURUS:
> + case CHIP_ALDEBARAN:
> + /* this is not fatal. We have a fallback below
> + * if the new firmwares are not present.
> + */
> + r = amdgpu_discovery_reg_base_init(adev);
> + if (!r) {
> + amdgpu_discovery_harvest_ip(adev);
> + amdgpu_discovery_get_gfx_info(adev);
> + amdgpu_discovery_get_mall_info(adev);
> + amdgpu_discovery_get_vcn_info(adev);
> + }
> + break;
> + default:
> + r = amdgpu_discovery_reg_base_init(adev);
> + if (r)
> + return -EINVAL;
> +
> + amdgpu_discovery_harvest_ip(adev);
> + amdgpu_discovery_get_gfx_info(adev);
> + amdgpu_discovery_get_mall_info(adev);
> + amdgpu_discovery_get_vcn_info(adev);
> + break;
> + }
> +
> switch (adev->asic_type) {
Looks like this fallback gets executed regardless of the
presence/absence of new firmware.
Thanks,
Lijo
> case CHIP_VEGA10:
> vega10_reg_base_init(adev);
> @@ -2700,14 +2730,6 @@ int amdgpu_discovery_set_ip_blocks(struct
> amdgpu_device *adev)
> adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0);
> break;
> default:
> - r = amdgpu_discovery_reg_base_init(adev);
> - if (r)
> - return -EINVAL;
> -
> - amdgpu_discovery_harvest_ip(adev);
> - amdgpu_discovery_get_gfx_info(adev);
> - amdgpu_discovery_get_mall_info(adev);
> - amdgpu_discovery_get_vcn_info(adev);
> break;
> }
>
