Adds register needed for debugging purposes.
Signed-off-by: Tom St Denis <[email protected]>
---
drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
index abdb8728156e..d6c02cf815be 100644
--- a/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
+++ b/drivers/gpu/drm/amd/include/asic_reg/gc/gc_11_5_0_offset.h
@@ -9478,6 +9478,8 @@
#define regRLC_GFX_IMU_CMD_BASE_IDX
1
#define regGFX_IMU_RLC_STATUS
0x4054
#define regGFX_IMU_RLC_STATUS_BASE_IDX
1
+#define regGFX_IMU_STATUS
0x4055
+#define regGFX_IMU_STATUS_BASE_IDX
1
#define regGFX_IMU_SOC_DATA
0x4059
#define regGFX_IMU_SOC_DATA_BASE_IDX
1
#define regGFX_IMU_SOC_ADDR
0x405a
--
2.45.2