[AMD Official Use Only - AMD Internal Distribution Only] Reviewed-by: Roman Li <[email protected]>
> -----Original Message----- > From: Mahfooz, Hamza <[email protected]> > Sent: Tuesday, August 6, 2024 10:18 AM > To: [email protected] > Cc: Wentland, Harry <[email protected]>; Li, Sun peng (Leo) > <[email protected]>; Siqueira, Rodrigo <[email protected]>; > Deucher, Alexander <[email protected]>; Hung, Alex > <[email protected]>; Lin, Wayne <[email protected]>; Li, Roman > <[email protected]>; Ma, Li <[email protected]>; Mahfooz, Hamza > <[email protected]> > Subject: [PATCH] drm/amd/display: fix s2idle entry for DCN3.5+ > > To be able to get to the lowest power state when suspending systems with > DCN3.5+, we must be in IPS before the display hardware is put into D3cold. > So, to ensure that the system always reaches the lowest power state while > suspending force systems that support IPS to enter idle optimizations before > entering D3cold. > > Signed-off-by: Hamza Mahfooz <[email protected]> > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > index a312c74f1e81..1169b0de7760 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c > @@ -2904,6 +2904,9 @@ static int dm_suspend(void *handle) > > hpd_rx_irq_work_suspend(dm); > > + if (adev->dm.dc->caps.ips_support) > + dc_allow_idle_optimizations(adev->dm.dc, true); > + > dc_set_power_state(dm->dc, DC_ACPI_CM_POWER_STATE_D3); > dc_dmub_srv_set_power_state(dm->dc->ctx->dmub_srv, > DC_ACPI_CM_POWER_STATE_D3); > > -- > 2.45.2
