[PATCH Review 1/1] drm/amdgpu: Show deferred error count for UMC

[Stanley . Yang]

Show deferred error count for UMC syfs node

Signed-off-by: Stanley.Yang <stanley.y...@amd.com>
Reviewed-by: Tao Zhou <tao.zh...@amd.com>
Reviewed-by: Hawking Zhang <hawking.zh...@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 35b4fff54ded..f35a74bf5265 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -632,8 +632,12 @@ static ssize_t amdgpu_ras_sysfs_read(struct device *dev,
                        dev_warn(obj->adev->dev, "Failed to reset error counter 
and error status");
        }
 
-       return sysfs_emit(buf, "%s: %lu\n%s: %lu\n", "ue", info.ue_count,
-                         "ce", info.ce_count);
+       if (info.head.block == AMDGPU_RAS_BLOCK__UMC)
+               return sysfs_emit(buf, "%s: %lu\n%s: %lu\n%s: %lu\n", "ue", 
info.ue_count,
+                               "ce", info.ce_count, "de", info.de_count);
+       else
+               return sysfs_emit(buf, "%s: %lu\n%s: %lu\n", "ue", 
info.ue_count,
+                               "ce", info.ce_count);
 }
 
 /* obj begin */
-- 
2.25.1