> -----Original Message----- > From: amd-gfx [mailto:[email protected]] On Behalf > Of Rex Zhu > Sent: Monday, July 03, 2017 6:14 AM > To: [email protected] > Cc: Zhu, Rex > Subject: [PATCH 2/4] drm/amd/powerplay: refine avfs enable code on fiji. > > 1. simplify avfs state switch. > 2. delete save/restore VFT table functions as not support > by fiji. > 3. implement thermal_avfs_enable funciton. > > Change-Id: I5e28672591d77b1ec9e3406d0fc7d42566831a08 > Signed-off-by: Rex Zhu <[email protected]>
Acked-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c | 19 ++++ > drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.h | 1 + > drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c | 115 ++------------ > ------- > 3 files changed, 28 insertions(+), 107 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c > b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c > index 6a320b2..ca24e15 100644 > --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.c > @@ -2129,6 +2129,25 @@ int fiji_thermal_setup_fan_table(struct > pp_hwmgr *hwmgr) > return 0; > } > > + > +int fiji_thermal_avfs_enable(struct pp_hwmgr *hwmgr) > +{ > + int ret; > + struct pp_smumgr *smumgr = (struct pp_smumgr *)(hwmgr- > >smumgr); > + struct fiji_smumgr *smu_data = (struct fiji_smumgr *)(smumgr- > >backend); > + > + if (smu_data->avfs.AvfsBtcStatus != AVFS_BTC_ENABLEAVFS) > + return 0; > + > + ret = smum_send_msg_to_smc(smumgr, > PPSMC_MSG_EnableAvfs); > + > + if (!ret) > + /* If this param is not changed, this function could fire > unnecessarily */ > + smu_data->avfs.AvfsBtcStatus = > AVFS_BTC_COMPLETED_PREVIOUSLY; > + > + return ret; > +} > + > static int fiji_program_mem_timing_parameters(struct pp_hwmgr *hwmgr) > { > struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr- > >backend); > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.h > b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.h > index 0e9e1f2..d9c72d9 100644 > --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.h > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smc.h > @@ -48,5 +48,6 @@ struct fiji_pt_defaults { > bool fiji_is_dpm_running(struct pp_hwmgr *hwmgr); > int fiji_populate_requested_graphic_levels(struct pp_hwmgr *hwmgr, > struct amd_pp_profile *request); > +int fiji_thermal_avfs_enable(struct pp_hwmgr *hwmgr); > #endif > > diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c > b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c > index a1cb785..719e885 100644 > --- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c > +++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c > @@ -194,22 +194,10 @@ static int fiji_start_avfs_btc(struct pp_smumgr > *smumgr) > int result = 0; > struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); > > - priv->avfs.AvfsBtcStatus = AVFS_BTC_STARTED; > if (priv->avfs.AvfsBtcParam) { > if (!smum_send_msg_to_smc_with_parameter(smumgr, > PPSMC_MSG_PerformBtc, priv- > >avfs.AvfsBtcParam)) { > - if (!smum_send_msg_to_smc(smumgr, > PPSMC_MSG_EnableAvfs)) { > - priv->avfs.AvfsBtcStatus = > AVFS_BTC_COMPLETED_UNSAVED; > - result = 0; > - } else { > - pr_err("[AVFS][fiji_start_avfs_btc] Attempt" > - " to Enable AVFS Failed!"); > - smum_send_msg_to_smc(smumgr, > PPSMC_MSG_DisableAvfs); > - result = -1; > - } > - } else { > - pr_err("[AVFS][fiji_start_avfs_btc] " > - "PerformBTC SMU msg failed"); > + pr_err("PerformBTC SMU msg failed \n"); > result = -1; > } > } > @@ -224,42 +212,6 @@ static int fiji_start_avfs_btc(struct pp_smumgr > *smumgr) > return result; > } > > -static int fiji_setup_pm_fuse_for_avfs(struct pp_smumgr *smumgr) > -{ > - int result = 0; > - uint32_t table_start; > - uint32_t charz_freq_addr, inversion_voltage_addr, charz_freq; > - uint16_t inversion_voltage; > - > - charz_freq = 0x30750000; /* In 10KHz units 0x00007530 Actual value > */ > - inversion_voltage = 0x1A04; /* mV Q14.2 0x41A Actual value */ > - > - PP_ASSERT_WITH_CODE(0 == > smu7_read_smc_sram_dword(smumgr, > - SMU7_FIRMWARE_HEADER_LOCATION + > offsetof(SMU73_Firmware_Header, > - PmFuseTable), &table_start, > 0x40000), > - "[AVFS][Fiji_SetupGfxLvlStruct] SMU could not > communicate " > - "starting address of PmFuse structure", > - return -1;); > - > - charz_freq_addr = table_start + > - offsetof(struct SMU73_Discrete_PmFuses, > PsmCharzFreq); > - inversion_voltage_addr = table_start + > - offsetof(struct SMU73_Discrete_PmFuses, > InversionVoltage); > - > - result = smu7_copy_bytes_to_smc(smumgr, charz_freq_addr, > - (uint8_t *)(&charz_freq), sizeof(charz_freq), > 0x40000); > - PP_ASSERT_WITH_CODE(0 == result, > - "[AVFS][fiji_setup_pm_fuse_for_avfs] charz_freq > could not " > - "be populated.", return -1;); > - > - result = smu7_copy_bytes_to_smc(smumgr, > inversion_voltage_addr, > - (uint8_t *)(&inversion_voltage), > sizeof(inversion_voltage), 0x40000); > - PP_ASSERT_WITH_CODE(0 == result, > "[AVFS][fiji_setup_pm_fuse_for_avfs] " > - "charz_freq could not be populated.", return -1;); > - > - return result; > -} > - > static int fiji_setup_graphics_level_structure(struct pp_smumgr *smumgr) > { > int32_t vr_config; > @@ -298,67 +250,18 @@ static int fiji_setup_graphics_level_structure(struct > pp_smumgr *smumgr) > return 0; > } > > -/* Work in Progress */ > -static int fiji_restore_vft_table(struct pp_smumgr *smumgr) > -{ > - struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); > - > - if (AVFS_BTC_COMPLETED_SAVED == priv->avfs.AvfsBtcStatus) { > - priv->avfs.AvfsBtcStatus = > AVFS_BTC_COMPLETED_RESTORED; > - return 0; > - } else > - return -EINVAL; > -} > - > -/* Work in Progress */ > -static int fiji_save_vft_table(struct pp_smumgr *smumgr) > -{ > - struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); > - > - if (AVFS_BTC_COMPLETED_SAVED == priv->avfs.AvfsBtcStatus) { > - priv->avfs.AvfsBtcStatus = > AVFS_BTC_COMPLETED_RESTORED; > - return 0; > - } else > - return -EINVAL; > -} > - > static int fiji_avfs_event_mgr(struct pp_smumgr *smumgr, bool > smu_started) > { > struct fiji_smumgr *priv = (struct fiji_smumgr *)(smumgr->backend); > > switch (priv->avfs.AvfsBtcStatus) { > - case AVFS_BTC_COMPLETED_SAVED: /*S3 State - Pre SMU Start */ > - priv->avfs.AvfsBtcStatus = AVFS_BTC_RESTOREVFT_FAILED; > - PP_ASSERT_WITH_CODE(0 == > fiji_restore_vft_table(smumgr), > - "[AVFS][fiji_avfs_event_mgr] Could not Copy > Graphics " > - "Level table over to SMU", > - return -1;); > - priv->avfs.AvfsBtcStatus = > AVFS_BTC_COMPLETED_RESTORED; > - break; > - case AVFS_BTC_COMPLETED_RESTORED: /*S3 State - Post SMU > Start*/ > - priv->avfs.AvfsBtcStatus = AVFS_BTC_SMUMSG_ERROR; > - PP_ASSERT_WITH_CODE(0 == > smum_send_msg_to_smc(smumgr, > - 0x666), > - "[AVFS][fiji_avfs_event_mgr] SMU did not > respond " > - "correctly to VftTableIsValid Msg", > - return -1;); > - priv->avfs.AvfsBtcStatus = AVFS_BTC_SMUMSG_ERROR; > - PP_ASSERT_WITH_CODE(0 == > smum_send_msg_to_smc(smumgr, > - PPSMC_MSG_EnableAvfs), > - "[AVFS][fiji_avfs_event_mgr] SMU did not > respond " > - "correctly to EnableAvfs Message Msg", > - return -1;); > - priv->avfs.AvfsBtcStatus = AVFS_BTC_COMPLETED_SAVED; > + case AVFS_BTC_COMPLETED_PREVIOUSLY: > break; > + > case AVFS_BTC_BOOT: /*Cold Boot State - Post SMU Start*/ > if (!smu_started) > break; > priv->avfs.AvfsBtcStatus = AVFS_BTC_FAILED; > - PP_ASSERT_WITH_CODE(0 == > fiji_setup_pm_fuse_for_avfs(smumgr), > - "[AVFS][fiji_avfs_event_mgr] Failure at " > - "fiji_setup_pm_fuse_for_avfs", > - return -1;); > - priv->avfs.AvfsBtcStatus = > AVFS_BTC_DPMTABLESETUP_FAILED; > PP_ASSERT_WITH_CODE(0 == > fiji_setup_graphics_level_structure(smumgr), > "[AVFS][fiji_avfs_event_mgr] Could not Copy > Graphics Level" > " table over to SMU", > @@ -373,18 +276,15 @@ static int fiji_avfs_event_mgr(struct pp_smumgr > *smumgr, bool smu_started) > "[AVFS][fiji_avfs_event_mgr] Failure at " > "fiji_start_avfs_btc. AVFS Disabled", > return -1;); > - priv->avfs.AvfsBtcStatus = AVFS_BTC_SAVEVFT_FAILED; > - PP_ASSERT_WITH_CODE(0 == fiji_save_vft_table(smumgr), > - "[AVFS][fiji_avfs_event_mgr] Could not save > VFT Table", > - return -1;); > - priv->avfs.AvfsBtcStatus = AVFS_BTC_COMPLETED_SAVED; > + > + priv->avfs.AvfsBtcStatus = AVFS_BTC_ENABLEAVFS; > break; > case AVFS_BTC_DISABLED: /* Do nothing */ > - break; > case AVFS_BTC_NOTSUPPORTED: /* Do nothing */ > + case AVFS_BTC_ENABLEAVFS: > break; > default: > - pr_err("[AVFS] Something is broken. See log!"); > + pr_err("AVFS failed status is %x !\n", priv- > >avfs.AvfsBtcStatus); > break; > } > return 0; > @@ -514,6 +414,7 @@ static int fiji_smu_init(struct pp_smumgr *smumgr) > .init_smc_table = fiji_init_smc_table, > .update_sclk_threshold = fiji_update_sclk_threshold, > .thermal_setup_fan_table = fiji_thermal_setup_fan_table, > + .thermal_avfs_enable = fiji_thermal_avfs_enable, > .populate_all_graphic_levels = fiji_populate_all_graphic_levels, > .populate_all_memory_levels = fiji_populate_all_memory_levels, > .get_mac_definition = fiji_get_mac_definition, > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
