> -----Original Message-----
> From: amd-gfx [mailto:[email protected]] On Behalf
> Of Rex Zhu
> Sent: Friday, June 02, 2017 8:19 AM
> To: [email protected]
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amd/powerplay: fix populate dpm level failed when s3
> on vega10.
> 
> As the min clk may be  large than boot level can support.
> in this case, just ignore the min clk.
> 
> Change-Id: I4fb6c7b269dc517ef4fe77a7288e9640bd0bd63a
> Signed-off-by: Rex Zhu <[email protected]>

Reviewed-by: Alex Deucher <[email protected]>

> ---
>  drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 13 ++++++----
> ---
>  1 file changed, 6 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> index a18d24a7..691b399 100644
> --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
> @@ -3119,11 +3119,10 @@ static int vega10_apply_state_adjust_rules(struct
> pp_hwmgr *hwmgr,
>       vega10_ps->performance_levels[0].gfx_clock = sclk;
>       vega10_ps->performance_levels[0].mem_clock = mclk;
> 
> -     vega10_ps->performance_levels[1].gfx_clock =
> -             (vega10_ps->performance_levels[1].gfx_clock >=
> -                             vega10_ps-
> >performance_levels[0].gfx_clock) ?
> -                                             vega10_ps-
> >performance_levels[1].gfx_clock :
> -                                             vega10_ps-
> >performance_levels[0].gfx_clock;
> +     if (vega10_ps->performance_levels[1].gfx_clock <
> +                     vega10_ps->performance_levels[0].gfx_clock)
> +             vega10_ps->performance_levels[0].gfx_clock =
> +                             vega10_ps-
> >performance_levels[1].gfx_clock;
> 
>       if (disable_mclk_switching) {
>               /* Set Mclk the max of level 0 and level 1 */
> @@ -3146,8 +3145,8 @@ static int vega10_apply_state_adjust_rules(struct
> pp_hwmgr *hwmgr,
>       } else {
>               if (vega10_ps->performance_levels[1].mem_clock <
>                               vega10_ps-
> >performance_levels[0].mem_clock)
> -                     vega10_ps->performance_levels[1].mem_clock =
> -                                     vega10_ps-
> >performance_levels[0].mem_clock;
> +                     vega10_ps->performance_levels[0].mem_clock =
> +                                     vega10_ps-
> >performance_levels[1].mem_clock;
>       }
> 
>       if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
> --
> 1.9.1
> 
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