On Thu, May 18, 2017 at 8:24 AM, Christian König <[email protected]> wrote: > From: Christian König <[email protected]> > > The DPB must be in VRAM, but not in the first segment. > > Signed-off-by: Christian König <[email protected]> > Tested-by: Arthur Marsh <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/radeon/radeon_uvd.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/radeon/radeon_uvd.c > b/drivers/gpu/drm/radeon/radeon_uvd.c > index fad4a11..0cd0e7b 100644 > --- a/drivers/gpu/drm/radeon/radeon_uvd.c > +++ b/drivers/gpu/drm/radeon/radeon_uvd.c > @@ -621,7 +621,7 @@ static int radeon_uvd_cs_reloc(struct radeon_cs_parser *p, > } > > /* TODO: is this still necessary on NI+ ? */ > - if ((cmd == 0 || cmd == 1 || cmd == 0x3) && > + if ((cmd == 0 || cmd == 0x3) && > (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) { > DRM_ERROR("msg/fb buffer %LX-%LX out of 256MB segment!\n", > start, end); > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
