> -----Original Message----- > From: amd-gfx [mailto:[email protected]] On Behalf > Of Tom St Denis > Sent: Tuesday, May 09, 2017 10:31 AM > To: [email protected] > Cc: StDenis, Tom > Subject: [PATCH] drm/amd/amdgpu: Find correct min clocks for vega10 > > Fixes: 1fe8f78d00589904b830a0ebd092c7810f625f00 > > Signed-off-by: Tom St Denis <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > index 7f7a19629bc5..25696d510a18 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > @@ -4519,14 +4519,18 @@ static void vega10_find_min_clock_index(struct > pp_hwmgr *hwmgr, > > for (i = 0; i < dpm_table->gfx_table.count; i++) { > if (dpm_table->gfx_table.dpm_levels[i].enabled && > - dpm_table->gfx_table.dpm_levels[i].value >= > min_sclk) > + dpm_table->gfx_table.dpm_levels[i].value >= > min_sclk) { > *sclk_idx = i; > + break; > + } > } > > for (i = 0; i < dpm_table->mem_table.count; i++) { > if (dpm_table->mem_table.dpm_levels[i].enabled && > - dpm_table->mem_table.dpm_levels[i].value >= > min_mclk) > + dpm_table->mem_table.dpm_levels[i].value >= > min_mclk) { > *mclk_idx = i; > + break; > + } > } > } > > -- > 2.12.0 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
