> -----Original Message----- > From: amd-gfx [mailto:[email protected]] On Behalf > Of Xiangliang Yu > Sent: Monday, April 24, 2017 2:58 AM > To: [email protected] > Cc: Yu, Xiangliang; Min, Frank > Subject: [PATCH 06/11] drm/amdgpu/soc15: enable UVD code path for sriov > > From: Frank Min <[email protected]> > > Enable UVD block for SRIOV. > > Signed-off-by: Frank Min <[email protected]> > Signed-off-by: Xiangliang Yu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]> > --- > drivers/gpu/drm/amd/amdgpu/soc15.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c > b/drivers/gpu/drm/amd/amdgpu/soc15.c > index 6999ac3..4e514b2 100644 > --- a/drivers/gpu/drm/amd/amdgpu/soc15.c > +++ b/drivers/gpu/drm/amd/amdgpu/soc15.c > @@ -482,8 +482,7 @@ int soc15_set_ip_blocks(struct amdgpu_device > *adev) > #endif > amdgpu_ip_block_add(adev, &gfx_v9_0_ip_block); > amdgpu_ip_block_add(adev, &sdma_v4_0_ip_block); > - if (!amdgpu_sriov_vf(adev)) > - amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block); > + amdgpu_ip_block_add(adev, &uvd_v7_0_ip_block); > amdgpu_ip_block_add(adev, &vce_v4_0_ip_block); > break; > default: > -- > 2.7.4 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
