On Thu, Apr 20, 2017 at 4:44 AM, Rex Zhu <[email protected]> wrote: > Change-Id: I0f98553985ddbda1473f5313ac803fb9a38ca43a > --- > drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 42 > ++++++++++++++++++++++ > drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h | 1 + > 2 files changed, 43 insertions(+) > > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > index 278def7..c8689ce 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c > @@ -2304,6 +2304,48 @@ static int vega10_avfs_enable(struct pp_hwmgr *hwmgr, > bool enable) > return 0; > } > > +static int vega10_populate_and_upload_avfs_fuse_override(struct pp_hwmgr > *hwmgr) > +{ > + int result = 0; > + > + /* Keep Commented until SMC is ready.*/ > + /* ULONGLONG SerialNumber = 0; > + ULONG TOP32, BOTTOM32;
Fix the types here. With that fixed, the series is: Reviewed-by: Alex Deucher <[email protected]> > + PHM_FusesDefault Fuses; > + PhwVega10_PrivateData *pPrivate = (PhwVega10_PrivateData > *)(pHwMgr->pBackEndPrivateData); > + AvfsFuseOverride_t * AVFSFuseTable = > &(pPrivate->smcStateTable.AvfsFuseOverrideTable); > + > + Vega10_SendMsgToSmc(pHwMgr->pSmuMgr, PPSMC_MSG_ReadSerialNumTop32); > + Vega10_ReadArgFromSmc(pHwMgr->pSmuMgr, &TOP32); > + > + Vega10_SendMsgToSmc(pHwMgr->pSmuMgr, PPSMC_MSG_ReadSerialNumBottom32); > + Vega10_ReadArgFromSmc(pHwMgr->pSmuMgr, &BOTTOM32); > + > + SerialNumber = ((ULONGLONG)BOTTOM32 << 32)| TOP32; > + > + if (PP_Override_GetDefaultFuseValue(SerialNumber, > PHM_Vega10FusesDefault, &Fuses) == PP_Result_OK) > + { > + AVFSFuseTable->VFT0_b = Fuses.VFT0_b; > + AVFSFuseTable->VFT0_m1 = Fuses.VFT0_m1; > + AVFSFuseTable->VFT0_m2 = Fuses.VFT0_m2; > + AVFSFuseTable->VFT1_b = Fuses.VFT1_b; > + AVFSFuseTable->VFT1_m1 = Fuses.VFT2_m1; > + AVFSFuseTable->VFT1_m2 = Fuses.VFT1_m2; > + AVFSFuseTable->VFT2_b = Fuses.VFT2_b; > + AVFSFuseTable->VFT2_m1 = Fuses.VFT2_m1; > + AVFSFuseTable->VFT2_m2 = Fuses.VFT2_m2; > + > + result = PhwVega10_SMCTableManager(pHwMgr, SMUTABLE_WRITE, > AVFSFUSETABLE_BIT_MASK); > + PP_ASSERT_WITH_CODE(pHwMgr->pPECI, PP_Result_OK == result, > "[PhwVega10_PopulateAndUploadAVFSFuseOverride] Failed to update > FuseOVerride!", return result;); > + } > + else > + { > + result = PP_Result_OK; > + } > +*/ > + return result; > +} > + > /** > * Initializes the SMC table and uploads it > * > diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h > b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h > index 83c67b9..6070896 100644 > --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h > +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.h > @@ -207,6 +207,7 @@ struct vega10_smc_state_table { > PPTable_t pp_table; > Watermarks_t water_marks_table; > AvfsTable_t avfs_table; > + AvfsFuseOverride_t AvfsFuseOverrideTable; > }; > > struct vega10_mclk_latency_entries { > -- > 1.9.1 > > _______________________________________________ > amd-gfx mailing list > [email protected] > https://lists.freedesktop.org/mailman/listinfo/amd-gfx _______________________________________________ amd-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/amd-gfx
