On Wed, Oct 26, 2016 at 03:28:26PM -0400, Alex Deucher wrote:
> Consolidate existing quirks. Fixes stability issues
> on some kickers.
> 
> Signed-off-by: Alex Deucher <[email protected]>

Acked-by: Huang Rui <[email protected]>

> ---
>  drivers/gpu/drm/amd/amdgpu/si_dpm.c | 59 
> +++++++++++++++++++++++++++----------
>  1 file changed, 43 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c 
> b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> index 21ed3db..f0f2f6c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
> @@ -3479,6 +3479,49 @@ static void si_apply_state_adjust_rules(struct 
> amdgpu_device *adev,
>       int i;
>       struct si_dpm_quirk *p = si_dpm_quirk_list;
>  
> +     /* limit all SI kickers */
> +     if (adev->asic_type == CHIP_PITCAIRN) {
> +             if ((adev->pdev->revision == 0x81) ||
> +                 (adev->pdev->device == 0x6810) ||
> +                 (adev->pdev->device == 0x6811) ||
> +                 (adev->pdev->device == 0x6816) ||
> +                 (adev->pdev->device == 0x6817) ||
> +                 (adev->pdev->device == 0x6806))
> +                     max_mclk = 120000;
> +     } else if (adev->asic_type == CHIP_VERDE) {
> +             if ((adev->pdev->revision == 0x81) ||
> +                 (adev->pdev->revision == 0x83) ||
> +                 (adev->pdev->revision == 0x87) ||
> +                 (adev->pdev->device == 0x6820) ||
> +                 (adev->pdev->device == 0x6821) ||
> +                 (adev->pdev->device == 0x6822) ||
> +                 (adev->pdev->device == 0x6823) ||
> +                 (adev->pdev->device == 0x682A) ||
> +                 (adev->pdev->device == 0x682B)) {
> +                     max_sclk = 75000;
> +                     max_mclk = 80000;
> +             }
> +     } else if (adev->asic_type == CHIP_OLAND) {
> +             if ((adev->pdev->revision == 0xC7) ||
> +                 (adev->pdev->revision == 0x80) ||
> +                 (adev->pdev->revision == 0x81) ||
> +                 (adev->pdev->revision == 0x83) ||
> +                 (adev->pdev->device == 0x6604) ||
> +                 (adev->pdev->device == 0x6605)) {
> +                     max_sclk = 75000;
> +                     max_mclk = 80000;
> +             }
> +     } else if (adev->asic_type == CHIP_HAINAN) {
> +             if ((adev->pdev->revision == 0x81) ||
> +                 (adev->pdev->revision == 0x83) ||
> +                 (adev->pdev->revision == 0xC3) ||
> +                 (adev->pdev->device == 0x6664) ||
> +                 (adev->pdev->device == 0x6665) ||
> +                 (adev->pdev->device == 0x6667)) {
> +                     max_sclk = 75000;
> +                     max_mclk = 80000;
> +             }
> +     }
>       /* Apply dpm quirks */
>       while (p && p->chip_device != 0) {
>               if (adev->pdev->vendor == p->chip_vendor &&
> @@ -3491,22 +3534,6 @@ static void si_apply_state_adjust_rules(struct 
> amdgpu_device *adev,
>               }
>               ++p;
>       }
> -     /* limit mclk on all R7 370 parts for stability */
> -     if (adev->pdev->device == 0x6811 &&
> -         adev->pdev->revision == 0x81)
> -             max_mclk = 120000;
> -     /* limit sclk/mclk on Jet parts for stability */
> -     if (adev->pdev->device == 0x6665 &&
> -         adev->pdev->revision == 0xc3) {
> -             max_sclk = 75000;
> -             max_mclk = 80000;
> -     }
> -     /* Limit clocks for some HD8600 parts */
> -     if (adev->pdev->device == 0x6660 &&
> -         adev->pdev->revision == 0x83) {
> -             max_sclk = 75000;
> -             max_mclk = 80000;
> -     }
>  
>       if (rps->vce_active) {
>               rps->evclk = 
> adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk;
> -- 
> 2.5.5
> 
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