From: Rex Zhu <[email protected]>
Change-Id: I4e5589050bec48a7a6d8bc707bcafbeabf3f5ce1
Signed-off-by: Rex Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
index 615b8b1..df66abe 100644
--- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
@@ -685,7 +685,7 @@ static int vce_v3_0_process_interrupt(struct amdgpu_device
*adev,
return 0;
}
-static void vce_v3_set_bypass_mode(struct amdgpu_device *adev, bool enable)
+static void vce_v3_0_set_bypass_mode(struct amdgpu_device *adev, bool enable)
{
u32 tmp = RREG32_SMC(ixGCK_DFS_BYPASS_CNTL);
@@ -705,7 +705,7 @@ static int vce_v3_0_set_clockgating_state(void *handle,
int i;
if (adev->asic_type == CHIP_POLARIS10)
- vce_v3_set_bypass_mode(adev, enable);
+ vce_v3_0_set_bypass_mode(adev, enable);
if (!(adev->cg_flags & AMD_CG_SUPPORT_VCE_MGCG))
return 0;
--
1.9.1
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