On 06/07/17 07:52, Gerd Hoffmann wrote: > Hi, > > Patch looks sane overall. > >> Invent a new, QEMU-specific register in the config space of the DRAM >> Controller, at offset 0x50, in order to allow guest firmware to query >> the >> TSEG (SMRAM) size. > > Hmm, 0x50 appears to be the only unused config space register in the > specs.
I did find more holes, in "Table 5-1. DRAM Controller Register Address Map (D0:F0)", in "Document Number: 316966-002". The hole at 0x50 is just the one with the lowest config space offset (after the standard PCI device header). The others are: - 0x58-0x59 (word) - 0x9c (byte) - 0x9f (byte) - 0xb2-0xc7 (eight words) - 0xce-0xdb (seven words) - 0xeb-0xff (fifteen bytes, but this range appears to come after the capability list, so I felt it would be unsafe to use) > I suspect in reality it isn't unused but undocumented. I don't > have a better idea though, and in practice it probably isn't much of a > problem. Thanks for confirming. Then I'll set out to write the OVMF-side patches for this. Once I have it all working, I'm going to send out the QEMU change as a real patch. Thanks! Laszlo