Actual serious v1 after the RFC [1]. The major change is to add local wrappers or versions of the BIT(), GENMASK(), and FIELD_PREP() macros for i915_reg.h to ensure u32 type and integer constant expressions.
It's a bit of a meh but does provide an opportunity for unified local naming of the macros. After some back and forth, REG_BIT(), REG_FIELD_MASK() and REG_FIELD() are what I settled on, but I guess I expect some bikeshedding... The big loss is the build-time checking of the defined field values; FIELD_PREP() does it in a way that prohibits macro use in e.g. case labels. bloat-o-meter indicates slight increase, unsurprising due to the added masking to avoid the values overflowing their fields. The changed sample is too small to make any big conclusions though. add/remove: 0/0 grow/shrink: 3/0 up/down: 81/0 (81) Function old new delta intel_dp_init_panel_power_sequencer_registers 863 912 +49 intel_pre_enable_lvds 618 646 +28 intel_pps_readout_hw_state 385 389 +4 Total: Before=1106128, After=1106209, chg +0.01% BR, Jani. [1] https://patchwork.freedesktop.org/series/50267/ Cc: Chris Wilson <ch...@chris-wilson.co.uk> Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com> Cc: Michal Wajdeczko <michal.wajdec...@intel.com> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com> Jani Nikula (3): drm/i915: introduce REG_BIT() and REG_FIELD_MASK() to define register contents drm/i915: deprecate _SHIFT in favor of FIELD_GET() and _MASK drm/i915: introduce REG_FIELD() to define register field values drivers/gpu/drm/i915/i915_reg.h | 129 ++++++++++++++++++++------------------ drivers/gpu/drm/i915/intel_dp.c | 42 +++++-------- drivers/gpu/drm/i915/intel_lvds.c | 40 ++++++------ 3 files changed, 104 insertions(+), 107 deletions(-) -- 2.11.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
