On 09/06/16 20:32, Alex Williamson wrote: > On Tue, 6 Sep 2016 21:14:11 +0300 > Marcel Apfelbaum <mar...@redhat.com> wrote: > >> On 09/06/2016 06:38 PM, Alex Williamson wrote: >>> On Thu, 1 Sep 2016 16:22:07 +0300 >>> Marcel Apfelbaum <mar...@redhat.com> wrote:
>>>> +5. Device assignment >>>> +==================== >>>> +Host devices are mostly PCIe and should be plugged only into PCIe ports. >>>> +PCI-PCI bridge slots can be used for legacy PCI host devices. >>> >>> I don't think we have any evidence to suggest this as a best practice. >>> We have a lot of experience placing PCIe host devices into a >>> conventional PCI topology on 440FX. We don't have nearly as much >>> experience placing them into downstream PCIe ports. This seems like >>> how we would like for things to behave to look like real hardware >>> platforms, but it's just navel gazing whether it's actually the right >>> thing to do. Thanks, >>> >> >> I had to look up the "navel gazing"... >> Why I do agree with your statements I prefer a cleaner PCI Express machine >> with as little legacy PCI as possible. I use this document as an opportunity >> to start gaining experience with device assignment into PCI Express Root >> Ports >> and Downstream Ports and solve the issues long the way. > > That's exactly what I mean, there's an ulterior, personal motivation in > this suggestion that's not really backed by facts. You'd like to make > the recommendation to place PCIe assigned devices into PCIe slots, but > that's not necessarily the configuration with the best track record > right now. In fact there's really no advantage to a user to do this > unless they have a device that needs PCIe (radeon and tg3 > potentially come to mind here). So while I agree with you from an > ideological standpoint, I don't think that's sufficient to make the > recommendation you're proposing here. Thanks, To reinforce what Marcel already replied, this document is all about ideology / policy, and not a status report. We should be looking forward, not backward. Permitting an exception for plugging a PCI Express device into a legacy PCI slot just because the PCI Express device is an assigned, physical one, dilutes the message, and will lead to all kinds of mess elsewhere. I'm acutely aware that conforming to the "PCI Express into PCI Express" recommendation might not *work* in practice, but that doesn't matter right now. This document should translate to a task list for QEMU and firmware developers alike. At least I need this document to exist primarily so I know what to do in OVMF, and what topologies in QE's BZs to reject out of hand. If the "PCI Express into PCI Express" guideline will require some VFIO work, and causes Q35 (not i440fx) users some pain, so be it, IMO. I'm saying this knowing that you know about ten billion times more about PCI / PCI Express than I do. Thanks Laszlo
